Patents by Inventor Olivier Le Briz
Olivier Le Briz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230030472Abstract: An optical sensor includes pixels, with each pixel formed by a photodetector and a telecentric system topping the photodetector. Each telecentric system includes: an opaque layer with openings facing the photodetector and a microlens facing each opening and arranged between the opaque layer and the photodetector. Each pixel further includes an optical filter between the microlenses and the photodetector. The optical filter may, for example, be an interference filter, a diffraction grating-based filter or a metasurface-based filter.Type: ApplicationFiled: July 20, 2022Publication date: February 2, 2023Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SASInventors: Axel CROCHERIE, Olivier LE-BRIZ
-
Patent number: 11454669Abstract: An integrated circuit die has a peripheral edge and a seal ring extending along the peripheral edge and surrounding a functional integrated circuit area. A test logic circuit located within the functional integrated circuit area generates a serial input data signal for application to a first end of a sensing conductive wire line extending around the seal ring between the seal ring and the peripheral edge of the integrated circuit die. Propagation of the serial input data signal along the sensing conductive wire line produces a serial output data signal at a second end of the sensing conductive wire line. The test logic circuit compares data patterns of the serial input data signal and serial output data signal to detect damage at the peripheral edge of the integrated circuit die.Type: GrantFiled: November 11, 2019Date of Patent: September 27, 2022Assignees: STMicroelectronics International N.V., STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SASInventors: Manoj Kumar, Lionel Courau, Geeta, Olivier Le-Briz
-
Patent number: 10998455Abstract: A light sensor includes first and second neighboring photodiodes that are separated from each other by a space. A light-absorbing material is positioned at a location which is vertically above the space between the neighboring photodiodes. A first multilayer interference filter includes a central portion located vertically above the first photodiode and a peripheral portion that at least partly extends to rest on top of and in contact with the light-absorbing material.Type: GrantFiled: October 28, 2019Date of Patent: May 4, 2021Assignee: STMicroelectronics (Grenoble 2) SASInventors: Olivier Le-Briz, Laurent Mouche
-
Publication number: 20200150174Abstract: An integrated circuit die has a peripheral edge and a seal ring extending along the peripheral edge and surrounding a functional integrated circuit area. A test logic circuit located within the functional integrated circuit area generates a serial input data signal for application to a first end of a sensing conductive wire line extending around the seal ring between the seal ring and the peripheral edge of the integrated circuit die. Propagation of the serial input data signal along the sensing conductive wire line produces a serial output data signal at a second end of the sensing conductive wire line. The test logic circuit compares data patterns of the serial input data signal and serial output data signal to detect damage at the peripheral edge of the integrated circuit die.Type: ApplicationFiled: November 11, 2019Publication date: May 14, 2020Applicants: STMicroelectronics International N.V., STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SASInventors: Manoj KUMAR, Lionel COURAU, GEETA, Olivier LE-BRIZ
-
Publication number: 20200135940Abstract: A light sensor includes first and second neighboring photodiodes that are separated from each other by a space. A light-absorbing material is positioned at a location which is vertically above the space between the neighboring photodiodes. A first multilayer interference filter includes a central portion located vertically above the first photodiode and a peripheral portion that at least partly extends to rest on top of and in contact with the light-absorbing material.Type: ApplicationFiled: October 28, 2019Publication date: April 30, 2020Applicant: STMicroelectronics (Grenoble 2) SASInventors: Olivier LE-BRIZ, Laurent MOUCHE
-
Patent number: 10455213Abstract: A three dimensional (3D) device is formed from a first level and a second level that are attached together. The first level includes a backside illuminated two dimensional (2D) image sensor including an array of first pixels sensitive to visible light. The second level includes a frontside illuminated depth sensor including an array of second pixels sensitive to near infrared light. The first and second levels are attached in a manner such that radiation, in particular the near infrared light, received at the backside of the first level passes through the first level to reach the depth sensor in the second level.Type: GrantFiled: March 23, 2017Date of Patent: October 22, 2019Assignee: STMicroelectronics (Grenoble 2) SASInventors: Jerome Chossat, Olivier Le-Briz
-
Publication number: 20180084238Abstract: A three dimensional (3D) device is formed from a first level and a second level that are attached together. The first level includes a backside illuminated two dimensional (2D) image sensor including an array of first pixels sensitive to visible light. The second level includes a frontside illuminated depth sensor including an array of second pixels sensitive to near infrared light. The first and second levels are attached in a manner such that radiation, in particular the near infrared light, received at the backside of the first level passes through the first level to reach the depth sensor in the second level.Type: ApplicationFiled: March 23, 2017Publication date: March 22, 2018Applicant: STMicroelectronics (Grenoble 2) SASInventors: Jerome Chossat, Olivier Le-Briz
-
Patent number: 9535157Abstract: A proximity sensor includes a radiation source configured to emit a primary radiation beam and a primary detector configured to pick up a reflected primary radiation beam. The radiation source is further configured to emit stray radiation. The sensor further includes a reference detector arranged to receive the stray radiation. The stray radiation may, for example, be emitted from either a side of the radiation source or a bottom of the radiation source.Type: GrantFiled: September 23, 2014Date of Patent: January 3, 2017Assignees: STMicroelectronics (Research & Development) Limited, STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Crolles 2) SASInventors: Adam Caley, Pierre-Jean Parodi-Keravec, Olivier Le Briz, Sandrine Lhostis
-
Patent number: 9245914Abstract: An electronic device is formed by a stack of an integrated circuit chip and an optical plate. The integrated circuit chip includes integrated circuits (such as optical circuits) formed on or in a semiconductor substrate plate. The optical integrated circuits may form an optical sensor. An electrical connection network is provided on the top side of the semiconductor substrate plate. Electrical connection lugs, which are connected to the electrical connection network through electrical connection vias, are mounted on the back side of the semiconductor substrate plate. The vias are through silicon vias situated at a distance from the periphery of the semiconductor substrate plate. The optical plate is configured to allow light radiation to pass to the optical integrated circuits.Type: GrantFiled: November 25, 2014Date of Patent: January 26, 2016Assignee: STMicroelectronics (Grenoble 2) SASInventors: Olivier Le-Briz, Romain Coffy
-
Publication number: 20150155324Abstract: An electronic device is formed by a stack of an integrated circuit chip and an optical plate. The integrated circuit chip includes integrated circuits (such as optical circuits) formed on or in a semiconductor substrate plate. The optical integrated circuits may form an optical sensor. An electrical connection network is provided on the top side of the semiconductor substrate plate. Electrical connection lugs, which are connected to the electrical connection network through electrical connection vias, are mounted on the back side of the semiconductor substrate plate. The vias are through silicon vias situated at a distance from the periphery of the semiconductor substrate plate. The optical plate is configured to allow light radiation to pass to the optical integrated circuits.Type: ApplicationFiled: November 25, 2014Publication date: June 4, 2015Applicant: STMICROELECTRONICS (GRENOBLE 2) SASInventors: Olivier Le-Briz, Romain Coffy
-
Publication number: 20150083900Abstract: A proximity sensor includes a radiation source configured to emit a primary radiation beam and a primary detector configured to pick up a reflected primary radiation beam. The radiation source is further configured to emit stray radiation. The sensor further includes a reference detector arranged to receive the stray radiation. The stray radiation may, for example, be emitted from either a side of the radiation source or a bottom of the radiation source.Type: ApplicationFiled: September 23, 2014Publication date: March 26, 2015Applicants: STMicroelectronics (Research & Development) Limited, STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Crolles 2) SASInventors: Adam Caley, Pierre-Jean Parodi-Keravec, Olivier Le Briz, Sandrine Lhostis
-
Patent number: 8493293Abstract: This invention relates to systems, methods and apparatus for driving organic light emitting diodes (OLED) displays, in particular those using multi-line addressing (MLA) techniques. Embodiments of the invention are particularly suitable for use with so-called passive matrix OLED displays. A current drive system for an electroluminescent display, the system comprising: a plurality of current mirrors having a plurality of outputs for driving a plurality of drive electrodes of said display, each said current mirror having a reference signal input; and an automatic selector coupled to said current mirror outputs to automatically select a said output for providing reference signal inputs to said current mirrors.Type: GrantFiled: March 6, 2007Date of Patent: July 23, 2013Assignees: Cambridge Display Technology Limited, STMicroelectronics S.A.Inventors: Paul Richard Routley, Olivier Le-Briz
-
Patent number: 8030988Abstract: A method and apparatus for generating multiple voltage level outputs from a single series of charge pump stages. The apparatus includes a plurality of voltage output circuits electrically connected in series. A selected number of the voltage output circuits include voltage output nodes that are available to be connected to loads. A control component in each voltage output circuit regulates operation of the charge pump stages within that circuit to provide a voltage level at the voltage output node regulated independently of other voltage output circuits in the series. The method and apparatus has the advantage of reducing the number of charge pump stages required to achieve a plurality of different voltage output levels. In another embodiment, the method and apparatus recycles charge within the apparatus by transferring charge between voltage output circuits through a load.Type: GrantFiled: December 31, 2009Date of Patent: October 4, 2011Assignees: STMicroelectronics Asia Pacific Pte. Ltd., STMicroelectronics (Grenoble 2) SASInventors: Swee Kiat Yap, Olivier Le-Briz, Sze-Kwang Tan
-
Publication number: 20110156803Abstract: A method and apparatus for generating multiple voltage level outputs from a single series of charge pump stages. The apparatus includes a plurality of voltage output circuits electrically connected in series. A selected number of the voltage output circuits include voltage output nodes that are available to be connected to loads. A control component in each voltage output circuit regulates operation of the charge pump stages within that circuit to provide a voltage level at the voltage output node regulated independently of other voltage output circuits in the series. The method and apparatus has the advantage of reducing the number of charge pump stages required to achieve a plurality of different voltage output levels. In another embodiment, the method and apparatus recycles charge within the apparatus by transferring charge between voltage output circuits through a load.Type: ApplicationFiled: December 31, 2009Publication date: June 30, 2011Applicant: STMICROELECTRONICS ASIA PACIFIC PTE LTD.Inventors: Swee Kiat Yap, Olivier Le-Briz, Sze-Kwang Tan
-
Publication number: 20100289779Abstract: This invention relates to systems, methods and apparatus for driving organic light emitting diodes (OLED) displays, in particular those using multi-line addressing (MLA) techniques. Embodiments of the invention are particularly suitable for use with so-called passive matrix OLED displays. A current drive system for an electroluminescent display, the system comprising: a plurality of current mirrors having a plurality of outputs for driving a plurality of drive electrodes of said display, each said current mirror having a reference signal input; and an automatic selector coupled to said current mirror outputs to automatically select a said output for providing reference signal inputs to said current mirrors.Type: ApplicationFiled: March 6, 2007Publication date: November 18, 2010Applicants: CAMBRIDGE DISPLAY TECHNOLOGY LIMITED, STMICROELECTRONICS S.A.Inventors: Paul R. Routley, Olivier Le-Briz
-
Patent number: 7755580Abstract: A method for regulating the biasing voltage of column control circuits of an array screen formed of LEDs distributed in lines and columns, the column control circuits being adapted to turning on at least one LED of a line. The method includes increasing the biasing voltage when the current flowing through at least one activated LED is smaller than a determined luminance current and of decreasing the biasing voltage when the current flowing through each activated LED is equal to the determined luminance current.Type: GrantFiled: August 13, 2004Date of Patent: July 13, 2010Assignee: STMicroelectronics S.A.Inventors: Céline Mas, Eric Benoit, Olivier Scouarnec, Olivier Le Briz, Danika Chaussy, Philippe Maige
-
Publication number: 20100141636Abstract: Row propagation delay is the duration it takes for a signal to travel the length of a row in a flat panel display matrix. Row propagation delay compensation modifies when column voltages are applied to each column in a flat panel matrix by substantially matching the delay for its position relative to the length of the row. A ternary signal generated by the timing controller with embedded clock and data information is buffered at the timing controller and transmitted to each column driver as required to substantially match row propagation delay while minimizing system interconnects and column driver circuitry.Type: ApplicationFiled: December 9, 2008Publication date: June 10, 2010Applicant: STMicroelectronics Asia Pacific Pte Ltd.Inventors: Sebastien Marsanne, Fabrice Boissieres, Olivier Le-Briz, Lionel Vogt
-
Patent number: 7701047Abstract: An integrated-circuit chip includes a first electrical connection are placed on an underlying layer and covered with an intermediate dielectric layer. A second electrical connection is placed on the intermediate dielectric layer and is covered with a superficial dielectric layer. External electrical connection pads are placed on the superficial dielectric layer and extend selectively over the first electrical connection. Vias pass through the superficial dielectric layer and the intermediate dielectric layer to make connection between the first electrical connection and the external electrical connection pads.Type: GrantFiled: March 19, 2007Date of Patent: April 20, 2010Assignees: STMicroelectronics S.A., STMicroelectronics S.r.l.Inventors: Olivier Le Briz, Sébastien Marsanne, Laurence Martin, Guiseppe Croce
-
Patent number: 7501704Abstract: An integrated circuit chip has a dielectric surface layer and, below this layer, internal pads. The chip is fabricated by producing multiplicities of vias made of an electrically conducting material which pass through said surface layer and are positioned respectively above the internal pads. Projecting external contact pads are formed on the surface layer and connected respectively to the multiplicities of vias.Type: GrantFiled: November 30, 2006Date of Patent: March 10, 2009Assignee: STMicroelectronics S.A.Inventors: Sébastien Marsanne, Olivier Le Briz
-
Patent number: 7463252Abstract: A method and circuit for displaying an image by activation of pixels of an array screen based on an image stored in digital form in memory point rows of a frame memory, having a stand-by mode that provides, at a frequency proportional to the display frequency, a cyclic succession of offset values; and for each row address of the frame memory, activating pixels of a screen line associated with said address offset by a same offset value based on the read states of the row associated with the address, and/or activating pixels of a screen line associated with the row address based on the read states of the frame memory row associated with the address offset by a same offset value.Type: GrantFiled: July 18, 2003Date of Patent: December 9, 2008Assignee: STMicroelectronics S.A.Inventors: Céline Mas, Eric Benoit, Olivier Scouarnec, Olivier Le Briz