Patents by Inventor Olivier Marichal

Olivier Marichal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10181464
    Abstract: Disclosed is an electrostatic discharge (ESD) protection circuit. The ESD protection circuit may include a silicon controller rectifier (SCR) which may be triggered via at least one of its first trigger gate or second trigger gate. The ESD protection circuit may further include a highly doped region coupled to either the anode or cathode of the SCR, wherein the highly doped region may provide additional carriers to facilitate triggering of the SCR during an ESD event, whereby the SCR may be triggered more quickly.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: January 15, 2019
    Assignee: SOFICS BVBA
    Inventors: Bart Sorgeloos, Benjamin Van Camp, Olivier Marichal
  • Publication number: 20180006016
    Abstract: Disclosed is an electrostatic discharge (ESD) protection circuit. The ESD protection circuit may include a silicon controller rectifier (SCR) which may be triggered via at least one of its first trigger gate or second trigger gate. The ESD protection circuit may further include a highly doped region coupled to either the anode or cathode of the SCR, wherein the highly doped region may provide additional carriers to facilitate triggering of the SCR during an ESD event, whereby the SCR may be triggered more quickly.
    Type: Application
    Filed: June 16, 2017
    Publication date: January 4, 2018
    Applicant: Sofics BVBA
    Inventors: Bart Sorgeloos, Benjamin Van Camp, Olivier Marichal
  • Patent number: 9685431
    Abstract: Disclosed is an electrostatic discharge (ESD) protection circuit. The ESD protection circuit may include a silicon controller rectifier (SCR) which may be triggered via at least one of its first trigger gate or second trigger gate. The ESD protection circuit may further include a highly doped region coupled to either the anode or cathode of the SCR, wherein the highly doped region may provide additional carriers to facilitate triggering of the SCR during an ESD event, whereby the SCR may be triggered more quickly.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: June 20, 2017
    Assignee: SOFICS BVBA
    Inventors: Bart Sorgeloos, Benjamin Van Camp, Olivier Marichal
  • Patent number: 9042065
    Abstract: An electrostatic discharge (ESD) protection circuit is disclosed including at least a clamping device, a switching device, and a voltage limiter. The ESD protection circuit may include devices of different voltage domains. The switching device may be in series with the clamping device to block at least a portion of a voltage from dropping across the clamping device. The switching device may sustain higher maximum operating voltages than the clamping device.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: May 26, 2015
    Assignee: Sofics BVBA
    Inventors: Sven Van Wijmeersch, Benjamin Van Camp, Olivier Marichal, Johan Van der Borght
  • Patent number: 9041054
    Abstract: A high holding voltage (HV) electrostatic discharge (ESD) protection circuit comprises a silicon controlled rectifier (SCR) device and compensation regions located within the length between the anode and cathode (LAC) of the SCR device which increase the holding voltage of the SCR device. The compensation regions may introduce negative feedback mechanisms into the SCR device which may influence the loop gain of the SCR and cause it to reach regenerative feedback at a higher holding voltage.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: May 26, 2015
    Assignee: Sofics BVBA
    Inventors: Sven Van Wijmeersch, Olivier Marichal
  • Publication number: 20150091056
    Abstract: Disclosed is an electrostatic discharge (ESD) protection circuit. The ESD protection circuit may include a silicon controller rectifier (SCR) which may be triggered via at least one of its first trigger gate or second trigger gate. The ESD protection circuit may further include a highly doped region coupled to either the anode or cathode of the SCR, wherein the highly doped region may provide additional carriers to facilitate triggering of the SCR during an ESD event, whereby the SCR may be triggered more quickly.
    Type: Application
    Filed: September 29, 2014
    Publication date: April 2, 2015
    Applicant: SOFICS BVBA
    Inventors: Bart Sorgeloos, Benjamin Van Camp, Olivier Marichal
  • Publication number: 20140159102
    Abstract: A high holding voltage (HV) electrostatic discharge (ESD) protection circuit comprises a silicon controlled rectifier (SCR) device and compensation regions located within the length between the anode and cathode (LAC) of the SCR device which increase the holding voltage of the SCR device. The compensation regions may introduce negative feedback mechanisms into the SCR device which may influence the loop gain of the SCR and cause it to reach regenerative feedback at a higher holding voltage.
    Type: Application
    Filed: February 14, 2014
    Publication date: June 12, 2014
    Applicant: SOFICS BVBA
    Inventors: Sven Van Wijmeersch, Olivier Marichal
  • Patent number: 8653557
    Abstract: A high holding voltage (HV) electrostatic discharge (ESD) protection circuit comprises a silicon controlled rectifier (SCR) device and compensation regions located within the length between the anode and cathode (LAC) of the SCR device which increase the holding voltage of the SCR device. The compensation regions may introduce negative feedback mechanisms into the SCR device which may influence the loop gain of the SCR and cause it to reach regenerative feedback at a higher holding voltage.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: February 18, 2014
    Assignee: Sofics BVBA
    Inventors: Sven Van Wijmeersch, Olivier Marichal
  • Patent number: 8143700
    Abstract: The present invention provides an electrostatic discharge (ESD) protection circuit with a silicon controlled rectifier (SCR) having a plurality of SCR fingers (SCRs) with the advantages to couple the different fingers or SCRs to decrease the multi-triggering problem and to increase the ESD-performance of the circuit. Additionally, a boost circuit can be introduced or additionally multiple SCRs can be coupled inherent through a common base.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: March 27, 2012
    Assignee: Sofics BVBA
    Inventors: Pieter Vanysacker, Benjamin Van Camp, Olivier Marichal, Wybo Geert, Steven Thijs, Gerd Vermont
  • Publication number: 20110204415
    Abstract: A high holding voltage (HV) electrostatic discharge (ESD) protection circuit comprises a silicon controlled rectifier (SCR) device and compensation regions located within the length between the anode and cathode (LAC) of the SCR device which increase the holding voltage of the SCR device. The compensation regions may introduce negative feedback mechanisms into the SCR device which may influence the loop gain of the SCR and cause it to reach regenerative feedback at a higher holding voltage.
    Type: Application
    Filed: February 17, 2011
    Publication date: August 25, 2011
    Applicant: SOFICS BVBA
    Inventors: Sven Van Wijmeersch, Olivier Marichal
  • Publication number: 20090101938
    Abstract: The present invention provides an electrostatic discharge (ESD) protection circuit with a silicon controlled rectifier (SCR) having a plurality of SCR fingers (SCRs) with the advantages to couple the different fingers or SCRs to decrease the multi-triggering problem and to increase the ESD-performance of the circuit. Additionally, a boost circuit can be introduced or additionally multiple SCRs can be coupled inherent through a common base.
    Type: Application
    Filed: December 29, 2008
    Publication date: April 23, 2009
    Applicants: SARNOFF CORPORATION, SARNOFF EUROPE
    Inventors: Pieter Vanysacker, Benjamin Van Camp, Olivier Marichal, Wybo Geert, Steven Thijs, Gerd Vermont
  • Publication number: 20080218920
    Abstract: An apparatus having an inter-domain electrostatic discharge (ESD) protection circuit for protection of an integrated circuit (IC) with multiple power domains. The protection circuit in response to an ESD event provides an ESD protection between different power domains. Specifically, the protection circuit comprises at least one clamp coupled to one power domain, which conducts current during an ESD event to provide extra current in the interface line between the two different power domains. This extra current also in turn increases the voltage over the impedance element on the interface line, thus improving the design margins for the ESD protection and providing a better ESD protection capability for IC products.
    Type: Application
    Filed: March 6, 2008
    Publication date: September 11, 2008
    Applicants: SARNOFF CORPORATION, SARNOFF EUROPE BVBA
    Inventors: Pieter Vanysacker, Olivier Marichal, Bart Sorgeloos, Benjamin Van Camp, Bart Keppens, Johan Van der Borght
  • Publication number: 20070002508
    Abstract: The present invention provides an electrostatic discharge (ESD) protection circuit with a silicon controlled rectifier (SCR) having a plurality of SCR fingers (SCRs) with the advantages to couple the different fingers or SCRs to decrease the multi-triggering problem and to increase the ESD-performance of the circuit. Additionally, a boost circuit can be introduced or additionally multiple SCRs can be coupled inherent through a common base.
    Type: Application
    Filed: March 30, 2006
    Publication date: January 4, 2007
    Inventors: Pieter Vanysacker, Benjamin Van Camp, Olivier Marichal, Wybo Geert, Steven Thijs, Gerd Vermont
  • Publication number: 20050212051
    Abstract: A silicon-on-insulator (SOI) electrostatic discharge (ESD) protection device that can protect very sensitive thin gate oxides by limiting the power dissipation during the ESD event, which is best achieved by reducing the voltage drop across the active (protection) device during an ESD event. In one embodiment, the invention provides very low triggering and holding voltages. Furthermore, the SOI protection device of the present invention has low impedance and low power dissipation characteristics that reduce voltage build-up, and accordingly, enable designers to fabricate more area efficient protection device.
    Type: Application
    Filed: May 10, 2005
    Publication date: September 29, 2005
    Inventors: Phillip Jozwiak, John Armer, Koen Gerard Verhaege, Benjamin Van Camp, Gerd Vermont, Olivier Marichal