Patents by Inventor Olivier POLLET

Olivier POLLET has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220173163
    Abstract: A method for increasing the surface roughness of a layer based on a metal having a catalytic power, includes fixing fluorine or chlorine on the surface of the metal based layer, by exposing the metal based layer to a plasma formed from a reactive gas containing fluorine or chlorine; exposing the surface of the metal based layer to a humid environment to produce an acid, by reaction of hydrogen from the humid environment with the fluorine or the chlorine fixed on the surface of the metal based layer, the acid reacting with the metal to form residues, the whole of the residues forming a pattern on the surface of the metal based layer, and etching the metal based layer through the residues, so as to transfer the pattern into the metal based layer.
    Type: Application
    Filed: November 24, 2021
    Publication date: June 2, 2022
    Inventors: Nicolas POSSEME, Laurent GRENOUILLET, Olivier POLLET
  • Publication number: 20220172959
    Abstract: A method for increasing the surface roughness of a metal layer, includes depositing on the metal layer a sacrificial layer made of a dielectric material including nitrogen; exposing a surface of the sacrificial layer to an etching plasma so as to create asperities; and etching the metal layer through the sacrificial layer, so as to transfer the asperities of the sacrificial layer into a part at least of the metal layer.
    Type: Application
    Filed: November 26, 2021
    Publication date: June 2, 2022
    Inventors: Olivier POLLET, Laurent GRENOUILLET, Nicolas POSSEME
  • Patent number: 11127835
    Abstract: There is provided a method for etching a dielectric layer covering at least partially a flank of a structure made of a semi-conductive material, the structure having at least one face, the method including a plurality of sequences, each including at least the following steps: a main oxidation so as to form an oxide film; a main anisotropic etching of the oxide film, carried out so as to etch a portion of the oxide film extending parallel to the flanks and at least some of the dielectric layer, be stopped before etching the structure and a whole thickness of another portion of the oxide film extending perpendicularly to the flanks, the steps being repeated until the complete removal of the dielectric layer located on the flanks of the structure.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: September 21, 2021
    Assignee: Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Nicolas Posseme, Vincent Ah-Leung, Olivier Pollet
  • Publication number: 20200251570
    Abstract: There is provided a method for etching a dielectric layer covering at least partially a flank of a structure made of a semi-conductive material, the structure having at least one face, the method including a plurality of sequences, each including at least the following steps: a main oxidation so as to form an oxide film; a main anisotropic etching of the oxide film, carried out so as to etch a portion of the oxide film extending parallel to the flanks and at least some of the dielectric layer, be stopped before etching the structure and a whole thickness of another portion of the oxide film extending perpendicularly to the flanks, the steps being repeated until the complete removal of the dielectric layer located on the flanks of the structure.
    Type: Application
    Filed: December 20, 2019
    Publication date: August 6, 2020
    Applicant: Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Nicolas POSSEME, Vincent Ah-Leung, Olivier Pollet
  • Patent number: 10043890
    Abstract: A method is provided for forming spacers of a gate of a field effect transistor, the gate including flanks and a top and being located above a layer of a semiconductor material, the method including a step of forming a dielectric layer covering the gate; after the step of forming, at least one step of modifying the dielectric layer by putting the dielectric layer into presence of a plasma creating a bombarding of light ions; and at least one step of removing the modified dielectric layer including a dry etching performed by putting the modified dielectric layer into presence of a gaseous mixture including at least one first component with a hydrofluoric acid base that transforms the modified dielectric layer into non-volatile residue, and removing the non-volatile residue via a wet clean performed after the dry etching or a thermal annealing of sublimation performed after or during the dry etching.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: August 7, 2018
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Olivier Pollet, Nicolas Posseme
  • Patent number: 9947541
    Abstract: A method for forming spacers of a gate of a field effect transistor is provided, the gate including sides and a top and being located above a layer of a semiconductor material, the method including a step of forming a dielectric layer that covers the gate; after the step of forming the dielectric layer, at least one step of modifying the dielectric layer by ion implantation while retaining non-modified portions of the dielectric layer covering sides of the gate and being at least non-modified over their entire thickness; the ions having a hydrogen base and/or a helium base; at least one step of removing the modified dielectric layer using a selective etching of the dielectric layer, wherein the removing includes a wet etching with a base of a solution including hydrofluoric acid diluted to x % by weight, with x?0.2, and having a pH less than or equal to 1.5.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: April 17, 2018
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Olivier Pollet, Maxime Garcia-Barros, Nicolas Posseme
  • Publication number: 20180012766
    Abstract: A method for forming spacers of a gate of a field effect transistor is provided, the gate including sides and a top and being located above a layer of a semiconductor material, the method including a step of forming a dielectric layer that covers the gate; after the step of forming the dielectric layer, at least one step of modifying the dielectric layer by ion implantation while retaining non-modified portions of the dielectric layer covering sides of the gate and being at least non-modified over their entire thickness; the ions having a hydrogen base and/or a helium base; at least one step of removing the modified dielectric layer using a selective etching of the dielectric layer, wherein the removing includes a wet etching with a base of a solution including hydrofluoric acid diluted to x % by weight, with x?0.2, and having a pH less than or equal to 1.5.
    Type: Application
    Filed: June 20, 2017
    Publication date: January 11, 2018
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Olivier Pollet, Maxime Garcia-Barros, Nicolas Posseme
  • Publication number: 20170084720
    Abstract: A method is provided for forming spacers of a gate of a field effect transistor, the gate including flanks and a top and being located above a layer of a semiconductor material, the method including a step of forming a dielectric layer covering the gate; after the step of forming, at least one step of modifying the dielectric layer by putting the dielectric layer into presence of a plasma creating a bombarding of light ions; and at least one step of removing the modified dielectric layer including a dry etching performed by putting the modified dielectric layer into presence of a gaseous mixture including at least one first component with a hydrofluoric acid base that transforms the modified dielectric layer into non-volatile residue, and removing the non-volatile residue via a wet clean performed after the dry etching or a thermal annealing of sublimation performed after or during the dry etching.
    Type: Application
    Filed: September 16, 2016
    Publication date: March 23, 2017
    Applicant: Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Olivier POLLET, Nicolas POSSEME