Patents by Inventor Olivier Rey

Olivier Rey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11959770
    Abstract: A method is presented for determining a reliability of a low-definition map to make the activation of at least one driving assistance system of an autonomous vehicle reliable when the autonomous vehicle is traveling on a road and wherein the vehicle comprises a navigation system and a perception system, the navigation system comprising the mapping and providing mapped data, the perception system providing measured data of the vehicle and/or the external environment of the vehicle, the method comprising the steps of: receiving mapped data; receiving measured data; determining a path of the road; calculating a road correlation value; calculating a sign correlation value; determining a reliability indicator, reliable or unreliable.
    Type: Grant
    Filed: February 2, 2022
    Date of Patent: April 16, 2024
    Assignee: PSA AUTOMOBILES SA
    Inventors: Olivier Deschenes, Alexis Rey, Pierre Clément Gauthier, Luc Vivet, Soumia Nid Bouhou
  • Patent number: 6492861
    Abstract: The charge pump device includes, in a cascade arrangement, a plurality of stages (1 to N) for transferring a potential charge from one stage to the next in response to clock signals (PHI, PA, PHINOT, PB), each stage including, arranged between an input (Ai) and an output (Ai+1), a switching circuit (100, 200) and a storage capacitor (Ca; Cb). Each switching circuit is formed of a first transistor (110; 130) and a second transistor (120; 140), the drains of the first and second transistors being connected to the input (Ai) of the stage, the source of the first transistor (110; 130) being connected to the gate of the second transistor (120; 140) and the source of the second transistor being connected to output (Ai+1) of the stage and to the gate of the first transistor. At each of the stages (1 to N) there are provided starting-up means (300; 400; 500) for keeping said second transistor (120, 140) in a non conducting state between two activation cycles of said charge pump device.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: December 10, 2002
    Assignee: EM Microelectronic-Marin SA
    Inventors: Olivier Rey, Christian Bonjour
  • Publication number: 20020171471
    Abstract: A regulating circuit for a high voltage generator, used in particular for supplying a non-volatile memory, includes an amplitude modulator (101) which receives at input terminals at least two clock signals (phi; nphi) and which supplies at output terminals at least two modulated clock signals (102; 103) to a charge pump (104). The circuit also includes a feedback loop, connecting an output of the charge pump to said amplitude modulator. This loop includes a comparator (109), which receives at a first input terminal an output quantity (Ibr) from the charge pump and at a second input terminal a reference quantity (Ipol), and which supplies at an output a comparison signal (Ucomp).
    Type: Application
    Filed: May 14, 2002
    Publication date: November 21, 2002
    Applicant: EM MICROELECTRONIC-MARIN SA
    Inventors: Jean-Felix Perotto, Olivier Rey
  • Patent number: 6314544
    Abstract: The object of the procedure according to the present invention is to characterise a voltage or current converter (20) intended to be connected to a capacitive circuit (32) arranged so as to provide a capacitance difference (C1−C2) to the converter. Said converter is arranged so as to be able to receive the capacitance difference provided by the circuit, and to provide an output voltage (Vo) which is a function of the capacitance difference and a bias signal. This procedure is characterised in that it includes a sequence of steps which consist in varying the bias signal, while keeping the capacitance difference constant and measuring in response the output voltage. One advantage of such a procedure lies in the fact that it allows the electric performance of the converter to be determined independently of the error link to the capacitance measuring.
    Type: Grant
    Filed: December 9, 1998
    Date of Patent: November 6, 2001
    Assignee: EM Microelectronic-Marin SA
    Inventors: Olivier Rey, Antal Banyai
  • Publication number: 20010015672
    Abstract: The charge pump device includes, in a cascade arrangement, a plurality of stages (1 to N) for transferring a potential charge from one stage to the next in response to clock signals (PHI, PA, PHINOT, PB), each stage including, arranged between an input (Ai) and an output (Ai+1), a switching circuit (100, 200) and a storage capacitor (Ca; Cb). Each switching circuit is formed of a first transistor (110; 130) and a second transistor (120; 140), the drains of the first and second transistors being connected to the input (Ai) of the stage, the source of the first transistor (110; 130) being connected to the gate of the second transistor (120; 140) and the source of the second transistor being connected to output (Ai+1) of the stage and to the gate of the first transistor. At each of the stages (1 to N) there are provided starting-up means (300; 400; 500) for keeping said second transistor (120, 140) in a non conducting state between two activation cycles of said charge pump device.
    Type: Application
    Filed: February 5, 2001
    Publication date: August 23, 2001
    Inventors: Olivier Rey, Christian Bonjour