Patents by Inventor Olof Tornblad

Olof Tornblad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105823
    Abstract: Transistor devices are provided. In one example, the transistor device includes a channel layer. The transistor device includes a multilayer barrier structure on the channel layer. The multilayer barrier structure includes a first Group III-nitride layer and a second Group III-nitride layer on the first Group III-nitride layer and opposite to the channel layer. The first Group III-nitride layer has a thickness greater than a thickness of the second Group III-nitride layer. An aluminum concentration of the first Group III-nitride layer is at least two times greater than an aluminum concentration of the second Group III-nitride layer.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Jia Guo, Kyle Bothe, Olof Tornblad, Scott Sheppard
  • Patent number: 10283587
    Abstract: A semiconductor device—e.g., a super junction power MOSFET—includes a number of columns of one type of dopant formed in a region of another type of dopant. Generally speaking, the columns are modulated in some manner. For example, the widths (e.g., diameters) of some columns are greater than the widths of other columns.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: May 7, 2019
    Assignee: VISHAY-SILICONIX
    Inventors: Deva Pattanayak, Olof Tornblad
  • Publication number: 20180240869
    Abstract: A semiconductor device—e.g., a super junction power MOSFET—includes a number of columns of one type of dopant formed in a region of another type of dopant. Generally speaking, the columns are modulated in some manner. For example, the widths (e.g., diameters) of some columns are greater than the widths of other columns.
    Type: Application
    Filed: February 6, 2018
    Publication date: August 23, 2018
    Inventors: Deva PATTANAYAK, Olof TORNBLAD
  • Patent number: 9887259
    Abstract: A semiconductor device—e.g., a super junction power MOSFET—includes a number of columns of one type of dopant formed in a region of another type of dopant. Generally speaking, the columns are modulated in some manner. For example, the widths (e.g., diameters) of some columns are greater than the widths of other columns.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: February 6, 2018
    Assignee: Vishay-Siliconix
    Inventors: Deva Pattanayak, Olof Tornblad
  • Publication number: 20150372078
    Abstract: A semiconductor device—e.g., a super junction power MOSFET—includes a number of columns of one type of dopant formed in a region of another type of dopant. Generally speaking, the columns are modulated in some manner. For example, the widths (e.g., diameters) of some columns are greater than the widths of other columns.
    Type: Application
    Filed: March 16, 2015
    Publication date: December 24, 2015
    Inventors: Deva PATTANAYAK, Olof TORNBLAD
  • Patent number: 7626233
    Abstract: An LDMOS transistor comprises source, channel and extended drain regions. The extended drain region comprises a plurality of islands that have a conductivity type that is opposite to the extended drain region. The islands have a depth less than a depth of the extended drain region.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: December 1, 2009
    Assignee: Infineon Technologies AG
    Inventors: Olof Tornblad, Gordon Ma
  • Publication number: 20080258215
    Abstract: An LDMOS transistor comprises source, channel and extended drain regions. The extended drain region comprises a plurality of islands that have a conductivity type that is opposite to the extended drain region. The islands have a depth less than a depth of the extended drain region.
    Type: Application
    Filed: April 23, 2007
    Publication date: October 23, 2008
    Inventors: Olof Tornblad, Gordon Ma
  • Patent number: 6989567
    Abstract: A semiconductor transistor structure includes a substrate having an epitaxial layer, a source region extending from the surface of the epitaxial layer, a drain region within the epitaxial layer, a channel located between the drain and source regions, and a gate arranged above the channel. The drain region includes a first region for establishing a contact with an electrode, a second region being less doped than the first region being buried within the epitaxial layer and extending from the first region horizontally in direction towards the gate, a third region less doped than the second region and extending vertically from the surface of the epitaxial layer and horizontally from the second region until under the gate, a top layer extending from the surface of the epitaxial layer to the second region, and a bottom layer extending from the second region into the epitaxial layer.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: January 24, 2006
    Assignee: Infineon Technologies North America Corp.
    Inventors: Olof Tornblad, Gordon Ma
  • Publication number: 20050073003
    Abstract: A semiconductor transistor structure comprises a substrate having an epitaxial layer, a source region extending from the surface of the epitaxial layer, a drain region within the epitaxial layer, a channel located between the drain and source regions, and a gate arranged above the channel. The drain region comprises a first region for establishing a contact with an electrode, a second region being less doped than the first region being buried within the epitaxial layer and extending from the first region horizontally in direction towards the gate, a third region less doped than the second region and extending vertically from the surface of the epitaxial layer and horizontally from the second region until under the gate, a top layer extending from the surface of the epitaxial layer to the second region, and a bottom layer extending from the second region into the epitaxial layer.
    Type: Application
    Filed: October 3, 2003
    Publication date: April 7, 2005
    Inventors: Olof Tornblad, Gordon Ma