Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor structure comprising silicon carbide. The semiconductor device further includes a mesa structure protruding in a first direction from the semiconductor structure, the mesa structure extending in a second direction between a first contact on the semiconductor structure and a second contact on the semiconductor structure. The semiconductor device further includes a channel region in the mesa structure. The semiconductor device further includes an electrically floating confining region, the electrically floating confining region in contact with the channel region in the mesa structure. The semiconductor device further includes a third contact on at least one sidewall of the mesa structure.

Abstract: Transistor devices having metal structures with rounded corners are provided. In one example, The transistor device includes a Group III-nitride semiconductor structure. The transistor device includes a gate contact and/or a field plate on the Group III-nitride semiconductor structure. One or more of the gate contact or the field plate includes at least one rounded corner.

Abstract: Transistor devices are provided. In one example, the transistor device includes a channel layer. The transistor device includes a multilayer barrier structure on the channel layer. The multilayer barrier structure includes a first Group III-nitride layer and a second Group III-nitride layer on the first Group III-nitride layer and opposite to the channel layer. The first Group III-nitride layer has a thickness greater than a thickness of the second Group III-nitride layer. An aluminum concentration of the first Group III-nitride layer is at least two times greater than an aluminum concentration of the second Group III-nitride layer.

Abstract: A semiconductor device—e.g., a super junction power MOSFET—includes a number of columns of one type of dopant formed in a region of another type of dopant. Generally speaking, the columns are modulated in some manner. For example, the widths (e.g., diameters) of some columns are greater than the widths of other columns.

Abstract: A semiconductor device—e.g., a super junction power MOSFET—includes a number of columns of one type of dopant formed in a region of another type of dopant. Generally speaking, the columns are modulated in some manner. For example, the widths (e.g., diameters) of some columns are greater than the widths of other columns.

Abstract: A semiconductor device—e.g., a super junction power MOSFET—includes a number of columns of one type of dopant formed in a region of another type of dopant. Generally speaking, the columns are modulated in some manner. For example, the widths (e.g., diameters) of some columns are greater than the widths of other columns.

Abstract: A semiconductor device—e.g., a super junction power MOSFET—includes a number of columns of one type of dopant formed in a region of another type of dopant. Generally speaking, the columns are modulated in some manner. For example, the widths (e.g., diameters) of some columns are greater than the widths of other columns.

Abstract: An LDMOS transistor comprises source, channel and extended drain regions. The extended drain region comprises a plurality of islands that have a conductivity type that is opposite to the extended drain region. The islands have a depth less than a depth of the extended drain region.

Abstract: An LDMOS transistor comprises source, channel and extended drain regions. The extended drain region comprises a plurality of islands that have a conductivity type that is opposite to the extended drain region. The islands have a depth less than a depth of the extended drain region.

Abstract: A semiconductor transistor structure includes a substrate having an epitaxial layer, a source region extending from the surface of the epitaxial layer, a drain region within the epitaxial layer, a channel located between the drain and source regions, and a gate arranged above the channel. The drain region includes a first region for establishing a contact with an electrode, a second region being less doped than the first region being buried within the epitaxial layer and extending from the first region horizontally in direction towards the gate, a third region less doped than the second region and extending vertically from the surface of the epitaxial layer and horizontally from the second region until under the gate, a top layer extending from the surface of the epitaxial layer to the second region, and a bottom layer extending from the second region into the epitaxial layer.

Abstract: A semiconductor transistor structure comprises a substrate having an epitaxial layer, a source region extending from the surface of the epitaxial layer, a drain region within the epitaxial layer, a channel located between the drain and source regions, and a gate arranged above the channel. The drain region comprises a first region for establishing a contact with an electrode, a second region being less doped than the first region being buried within the epitaxial layer and extending from the first region horizontally in direction towards the gate, a third region less doped than the second region and extending vertically from the surface of the epitaxial layer and horizontally from the second region until under the gate, a top layer extending from the surface of the epitaxial layer to the second region, and a bottom layer extending from the second region into the epitaxial layer.