Abstract: A system and method consistent with the present disclosure includes a master device, bus interface link, and slave device. The master device includes a power supply and a detection unit to detect an impedance of the power supply. The inverter provides a first path to the power supply on a first stage of a clock signal and. Further, the inverter provides a second path to a first ground line on a second stage of a clock signal. The bus interface link couples the master device to a slave device. Additionally, a bi-directional communications line is coupled to the bus interface link. A gating component provides a second ground line to the power supply through the first path. Furthermore, a receiver determines bit values from a plurality of clock data signals transmitted from the master device.

Abstract: The disclosed invention relates to a transceiver system having a bypass signal path that enables low power consumption. The transceiver system has transmission path and a reception path. The transmission path provides a signal from a transmission chain to an antenna for wireless transmission. The reception path provides a signal from the antenna to a reception chain. A duplex filter that provides isolation between the transmission and reception paths is connected between the antenna and the transmission and reception paths. A bypass signal path selectively exchanges signals between the transmission chain and the antenna along a conductive path that bypasses the duplex filter. By using the bypass signal path to selectively exchange signals between the transmission chain and the antenna the insertion loss of the duplex filter can be mitigated, allowing for the transceiver system to operate at a lower power.

Abstract: A device or system for transmission and reception for voice or data communication applications. The device or system is capable of duplex operation and adapted to operate in an environment using a plurality of frequency bands. The present disclosure also relates to a communication means including a transmitter and receiver arrangement and to antennas.

Abstract: A device or system for transmission and reception for voice or data communication applications. The device or system is capable of duplex operation and adapted to operate in an environment using a plurality of frequency bands. The present disclosure also relates to a communication means including a transmitter and receiver arrangement and to antennas.

Abstract: A device or system for transmission and reception for voice or data communication applications. The device or system is capable of duplex operation and adapted to operate in an environment using a plurality of frequency bands. The present disclosure also relates to a communication means including a transmitter and receiver arrangement and to antennas.

Abstract: A system and method consistent with the present disclosure includes a master device, bus interface link, and slave device. The master device includes a power supply and a detection unit to detect an impedance of the power supply. The inverter provides a first path to the power supply on a first stage of a clock signal and. Further, the inverter provides a second path to a first ground line on a second stage of a clock signal. The bus interface link couples the master device to a slave device. Additionally, a bi-directional communications line is coupled to the bus interface link. A gating component provides a second ground line to the power supply through the first path. Furthermore, a receiver determines bit values from a plurality of clock data signals transmitted from the master device.

Abstract: The disclosed invention relates to a transceiver system having a bypass signal path that enables low power consumption. The transceiver system has transmission path and a reception path. The transmission path provides a signal from a transmission chain to an antenna for wireless transmission. The reception path provides a signal from the antenna to a reception chain. A duplex filter that provides isolation between the transmission and reception paths is connected between the antenna and the transmission and reception paths. A bypass signal path selectively exchanges signals between the transmission chain and the antenna along a conductive path that bypasses the duplex filter. By using the bypass signal path to selectively exchange signals between the transmission chain and the antenna the insertion loss of the duplex filter can be mitigated, allowing for the transceiver system to operate at a lower power.

Abstract: A device or system for transmission and reception for voice or data communication applications. The device or system is capable of duplex operation and adapted to operate in an environment using a plurality of frequency bands. The present disclosure also relates to a communication means including a transmitter and receiver arrangement and to antennas.

Abstract: A phase-locked loop circuit has an output amplifier (27) and a main feedback path from the output of the output amplifier (27). A subsidiary feedback path is provided directly from the output of the circuit's VCO (32). At the start of operation, the output amplifier (27) is disabled and the subsidiary feedback path is used until lock is achieved. Then the output amplifier (27) is enabled and the main feedback loop is used. This avoids spurious outputs from the outer amplifier while to loop locks.

Abstract: A polar loop transmitter includes separate phase and envelope paths providing a linearising scheme for an efficient non-linear power amplifier. Loop filters are included in each of the phase and envelope paths to enable the path characteristics to be matched to one another. A polar loop transmitter and other types of envelope elimination and restoration transmitters control the output envelope of the power amplifier by connecting the output of the envelope detector, or in an envelope feedback transmitter, the envelope error signal, to the bias control input of the power amplifier. The transmitter can further include compensation means for compensating for non-linearities in the envelope control means and a loss of feedback control detector to ensure that the feedback signal remains within acceptable limits.

Abstract: A phase-locked loop circuit has an output amplifier (27) and a main feedback path from the output of the output amplifier (27). A subsidiary feedback path is provided directly from the output of the circuit's VCO (32). At the start of operation, the output amplifier (27) is disabled and the subsidiary feedback path is used until lock is achieved. Then the output amplifier (27) is enabled and the main feedback loop is used. This avoids spurious outputs from the outer amplifier while to loop locks.

Abstract: A polar loop transmitter includes separate phase and envelope paths providing a linearizing scheme for an efficient non-linear power amplifier. Loop filters are included in each of the phase and envelope paths to enable the path characteristics to be matched to one another. A polar loop transmitter and other types of envelope elimination and restoration transmitters control the output envelope of the power amplifier by connecting the output of the envelope detector, or in an envelope feedback transmitter, the envelope error signal, to the bias control input of the power amplifier. The transmitter can further include compensation means for compensating for non-linearities in the envelope control means and a loss of feedback control detector to ensure that the feedback signal remains within acceptable limits.