Patents by Inventor Om Kanwar

Om Kanwar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8555237
    Abstract: An apparatus and method for reporting design rule violations of an integrated circuit design includes collecting data from a design rule checker module, processing the data, and displaying design rule violations onto the layout. The display of the design rule violations may be interactive by including hypertext links to specifications, text bubbles with violation explanations, measurements, highlighting areas of the layout corresponding to a particular rule, and providing hierarchically expandable nodes for constraint violations in a browser.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: October 8, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Pardeep Juneja, Om Kanwar, Harindranath Parameswaran