Patents by Inventor Omar Eldaiki

Omar Eldaiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240313380
    Abstract: A device includes a top ferrite layer and a bottom ferrite layer. The device also includes a first circuit stack between the top ferrite layer and the bottom ferrite layer. The first circuit stack includes a first dielectric layer and a circulator circuit including a first circuit portion on a first side of the first dielectric layer and a second circuit portion on a second side of the first dielectric layer opposite the first side. The first circuit portion is different from the second circuit portion. The device also includes a second circuit stack including a second dielectric layer and a top ground layer disposed over the second dielectric layer. The second circuit stack is disposed over the top ferrite layer.
    Type: Application
    Filed: March 15, 2024
    Publication date: September 19, 2024
    Applicant: TTM Technologies, Inc.
    Inventors: Omar Eldaiki, Niels Husted Kirkeby
  • Patent number: 11406008
    Abstract: A wideband termination circuit layout is provided for high power applications. The circuit layout may include a dielectric layer having a first surface and a second surface. The circuit layout may also include an input port disposed over the first surface. The circuit layout may further include at least two resistive film patches disposed over the first surface of the dielectric layer and a tuning line between the at least two resistive films disposed over the first surface of the dielectric layer. The at least two resistive film patches are connected in series with the at least one tuning line.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: August 2, 2022
    Assignee: TTM Technologies Inc.
    Inventors: Omar Eldaiki, Chong Mei
  • Patent number: 11362407
    Abstract: A directional coupler may include a first coupled section comprising a first and a second coupled transmission lines, the first coupled transmission line having a first end coupled to an input port. The directional coupler may also include a second coupled section comprising a first and a second coupled transmission lines. The directional coupler may also include a third coupled section comprising a first and a second coupled transmission lines. The first coupled transmission line of the third coupled section has a first end coupled to a second end of the second coupled transmission line of the second coupled section and a second end coupled to an output port. The directional coupler may further include a delay section. A total electrical length of the first coupled section, the second coupled section, the third coupled section, and the delay section is about 90 degrees.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: June 14, 2022
    Assignee: TTM Technologies Inc.
    Inventors: Chong Mei, Omar Eldaiki, Samir Tozin
  • Publication number: 20210273308
    Abstract: A directional coupler may include a first coupled section comprising a first and a second coupled transmission lines, the first coupled transmission line having a first end coupled to an input port. The directional coupler may also include a second coupled section comprising a first and a second coupled transmission lines. The directional coupler may also include a third coupled section comprising a first and a second coupled transmission lines. The first coupled transmission line of the third coupled section has a first end coupled to a second end of the second coupled transmission line of the second coupled section and a second end coupled to an output port. The directional coupler may further include a delay section. A total electrical length of the first coupled section, the second coupled section, the third coupled section, and the delay section is about 90 degrees.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 2, 2021
    Inventors: Chong Mei, Omar Eldaiki, Samir Tozin
  • Publication number: 20210127482
    Abstract: A wideband termination circuit layout is provided for high power applications. The circuit layout may include a dielectric layer having a first surface and a second surface. The circuit layout may also include an input port disposed over the first surface. The circuit layout may further include at least two resistive film patches disposed over the first surface of the dielectric layer and a tuning line between the at least two resistive films disposed over the first surface of the dielectric layer. The at least two resistive film patches are connected in series with the at least one tuning line.
    Type: Application
    Filed: August 21, 2020
    Publication date: April 29, 2021
    Inventors: Omar Eldaiki, Chong Mei
  • Patent number: 10772193
    Abstract: A wideband termination circuit layout is provided for high power applications. The circuit layout may include a dielectric layer having a first surface and a second surface. The circuit layout may also include an input port disposed over the first surface. The circuit layout may further include at least two resistive film patches disposed over the first surface of the dielectric layer and a tuning line between the at least two resistive films disposed over the first surface of the dielectric layer. The at least two resistive film patches are connected in series with the at least one tuning line.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: September 8, 2020
    Assignee: TTM Technologies Inc.
    Inventors: Omar Eldaiki, Chong Mei
  • Patent number: 10581399
    Abstract: The present invention is directed to an impedance matching network for use at a predetermined frequency.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: March 3, 2020
    Assignee: Anaren, Inc.
    Inventors: Chong Mei, Omar Eldaiki, Hans Peter Ostergaard
  • Publication number: 20170310297
    Abstract: The present invention is directed to an impedance matching network for use at a predetermined frequency.
    Type: Application
    Filed: July 27, 2016
    Publication date: October 26, 2017
    Applicant: Anaren, Inc.
    Inventors: Chong Mei, Omar Eldaiki, Hans Peter Ostergaard