Abstract: In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including forming a film on a surface of a substrate, the film designed to prevent the seeding of an electroless plating catalyst, laser ablating the surface of the substrate through the film to form trenches, and seeding the surface of the substrate with an electroless plating catalyst. Other embodiments are also disclosed and claimed.

Abstract: A printed circuit is made with a via-defining substrate including a microelectronic substrate defining via openings therein. Interconnects are provided on the via-defining substrate according to a predetermined interconnect pattern. The interconnects include a conductive layer having a pattern corresponding to the predetermined interconnect pattern. The conductive layer further being made substantially from a first material. The conductive layer further including a second material that is different from the first material. The second material including a metallic seeding material and is present on the via-defining substrate only at regions corresponding to the interconnects. The interconnects are formed by catalyzing the conductive layer with an activator layer to electrolessly plate the via-defining substrate with the first material.