Patents by Inventor Omid SALEHZADEH EINABAD

Omid SALEHZADEH EINABAD has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11837681
    Abstract: An avalanche photodiode with a diffused junction and the method for its fabrication are disclosed. The method comprising forming, on a substrate, a first high-doped region and a low-doped region; performing selective area growth (SAG) with in-situ etchant on the low-doped region to grow a SAG structure; and diffusing through the SAG structure to form a second high-doped region in the low-doped region.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: December 5, 2023
    Assignee: NATIONAL RESEARCH COUNCIL OF CANADA
    Inventors: Oliver Pitts, Omid Salehzadeh Einabad
  • Publication number: 20230378721
    Abstract: There is provided a method for fabricating a corrugated buried heterostructure laser, including patterning a dielectric layer coating a substrate having a <0-11> direction to obtain a hollow corrugated structure. The hollow corrugated structure includes a central portion and regularly spaced-apart tabs laterally extending from the central portion and aligned with the <0-11> direction. The method also includes, in a single metal organic chemical vapour deposition run, forming an active region in the hollow corrugated structure to obtain the corrugated buried heterostructure laser. The single run combines selective area growth, p-dopant diffusion and etching techniques.
    Type: Application
    Filed: December 11, 2020
    Publication date: November 23, 2023
    Inventor: Omid Salehzadeh EINABAD
  • Publication number: 20230352912
    Abstract: A heterostructure laser is provided comprising an epitaxially grown substrate of first dopant type, an active region and layer of second dopant type, a narrow mesa having less than 20% open area and a side wall slope of less than 85 degrees, wherein said narrow mesa is etched through the active region and layer of second dopant type using in-situ MOCVD, a plurality of current blocking layers, an overclad layer and a contact layer of second dopant type, and an isolation mesa incorporating the narrow mesa, wherein the isolation mesa is etched through the active region, layer of second dopant type and plurality of current blocking layers and wherein the plurality of current blocking layers is grown without exposure to oxygen.
    Type: Application
    Filed: September 17, 2021
    Publication date: November 2, 2023
    Inventors: Omid Salehzadeh EINABAD, Anthony SPRINGTHORPE, Daniel BONNEAU, Grzegorz PAKULSKI, Muhammad MOHSIN
  • Publication number: 20230014644
    Abstract: There is provided a method for fabricating a vertically tapered spot-size converter on a substrate, comprising: growing a waveguide core on the substrate; coating the waveguide core with a photoresist layer; placing a photomask having patterns at a negative focus offset point with respect to the photoresist layer, the patterns being defined by openings in the photomask, each opening having a cross-section comprising a region of constant width and at least one region of non-constant width, the non-constant width reducing in a direction extending away from the region of constant width; transferring the patterns of the photomask to the photoresist layer; providing the waveguide core with a vertically tapered profile, the vertically tapered profile being provided by the patterns of the photomask; growing a cladding layer over the waveguide core; and patterning and etching the cladding layer and the waveguide core, thereby defining the vertically tapered spot-size converter.
    Type: Application
    Filed: December 11, 2020
    Publication date: January 19, 2023
    Inventors: Omid SALEHZADEH EINABAD, Christina ELLIOTT, Brian RIOUX, Nicaulus SABOURIN, Martin VACHON
  • Publication number: 20230006424
    Abstract: A method for fabricating a buried heterostructure semiconductor optical amplifier is provided. The method includes a step providing a patterned dielectric layer on a substrate, the patterned dielectric layer having openings to expose uncovered regions of the substrate. The method also includes, in a single metal organic chemical vapour deposition (MOCVD) run: etching the uncovered regions of the substrate to form angles at corresponding edges thereof and diffusing a p-dopant in the substrate to obtain a p-dopant distribution in a portion of the substrate; etching a portion of the p-dopant thereby defining a recess in the substrate and growing a n-blocking layer in the recess; sequentially growing, over a portion of the n-blocking layer, an active region, a p-overclad, a p-contact, and a p-metal contact; and growing a n-metal contact on a backside of the substrate. The single MOCVD run combines selective area growth, p-dopant diffusion and etching techniques.
    Type: Application
    Filed: December 11, 2020
    Publication date: January 5, 2023
    Inventor: Omid SALEHZADEH EINABAD
  • Publication number: 20220093815
    Abstract: An avalanche photodiode with a diffused junction and the method for its fabrication are disclosed. The method comprising forming, on a substrate, a first high-doped region and a low-doped region; performing selective area growth (SAG) with in-situ etchant on the low-doped region to grow a SAG structure; and diffusing through the SAG structure to form a second high-doped region in the low-doped region.
    Type: Application
    Filed: December 9, 2019
    Publication date: March 24, 2022
    Applicant: NATIONAL RESEARCH COUNCIL OF CANADA
    Inventors: Oliver PITTS, Omid SALEHZADEH EINABAD