Patents by Inventor Omkar Ulhas Javeri

Omkar Ulhas Javeri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11983576
    Abstract: A method, computer program product, and system include a processor(s) issues an instruction that includes processing core information that includes locations of processing cores of the computing system (logical cores and/or physical cores), and an operator selection. The processor(s) sets security parameters for information returned by the instruction which is topological information for mapping of the logical cores to the physical cores. The processor(s) obtains the topological information and utilizes an operating system to map the logical cores to the physical cores.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: May 14, 2024
    Inventors: Omkar Ulhas Javeri, Peter Dana Driever, Brian Keith Wade, Seth E. Lederer
  • Publication number: 20230043202
    Abstract: A query operation is performed to obtain information for a select entity of a computing environment. The information includes boost information of one or more boost features currently available for the select entity. The one or more boost features are to be used to temporarily adjust one or more processing attributes of the select entity. The boost information obtained from performing the query operation is provided in an accessible location to be used to perform one or more actions to facilitate processing in the computing environment.
    Type: Application
    Filed: August 5, 2021
    Publication date: February 9, 2023
    Inventors: Omkar Ulhas Javeri, David Harold Surman, Seth E. Lederer, Peter Jeremy Relson, Jonathan D. Bradbury, Hunter J. Kauffman, Martin Stock, Brent J. Boisvert
  • Publication number: 20230040725
    Abstract: A method, computer program product, and system include a processor(s) issues an instruction that includes processing core information that includes locations of processing cores of the computing system (logical cores and/or physical cores), and an operator selection. The processor(s) sets security parameters for information returned by the instruction which is topological information for mapping of the logical cores to the physical cores. The processor(s) obtains the topological information and utilizes an operating system to map the logical cores to the physical cores.
    Type: Application
    Filed: August 4, 2021
    Publication date: February 9, 2023
    Inventors: Omkar Ulhas Javeri, Peter Dana Driever, Brian Keith Wade, Seth E. Lederer