Patents by Inventor On Chau

On Chau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7495426
    Abstract: A temperature setpoint circuit comprises bipolar transistors Q1 and Q2 which receive currents I1 and I2 at their respective collectors and are operated at unequal current densities, with a resistance R1 connected between their bases such that the difference in their base-emitter voltages (?Vbe) appears across R1. An additional PTAT current I3 is maintained in a constant ratio to I1 and I2 and provided to the collector of Q2 while Q2 is off, and is not provided while Q2 is on. The circuit is arranged such that Q2 is turned on and conducts a current equal to Ia when: ?Vbe=(kT/q)ln(NI1/Ia), where Ia=I2+I3, the temperature T at which ?Vbe=(kT/q)ln(NI1/Ia) being the circuit's setpoint temperature, such that the switching of current I3 provides hysteresis for the setpoint temperature which is approximately constant over temperature.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: February 24, 2009
    Assignee: Analog Devices, Inc.
    Inventors: Chau C. Tran, A. Paul Brokaw
  • Patent number: 7494610
    Abstract: A method of activating a zeolite membrane comprising a step of placing the membrane in contact with a fluid mixture containing ozone, wherein when the fluid mixture is a gaseous mixture, the fluid mixture has a temperature of at least 423K, and wherein when the fluid mixture is a liquid mixture, the fluid mixture has a temperature of 353K.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: February 24, 2009
    Assignee: The Hong Kong University of Science and Technology
    Inventors: King Lun Yeung, Koon Fung Lam, Samuel Heng, Lik Hang Joseph Chau
  • Patent number: 7495479
    Abstract: Disclosed is a sample and hold circuit for detecting a parameter of a data signal, which includes: a first switching module, wherein the sample and hold circuit samples the data signal according to the turning on or off of the first switching module; at least one capacitor, coupled to the first switching module; a second switching module, coupled to the capacitor; a controllable reference voltage source, for providing a first reference voltage to charge/discharge the capacitor via the second switching module according to a control signal; a first comparator, coupled to the capacitor, for comparing a voltage drop on the capacitor and the first reference voltage to generate a first comparing result; and a control circuit, coupled to the controllable reference voltage source and the first comparator, for generating the control signal according to the comparing results.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: February 24, 2009
    Assignee: Faraday Technology Corp.
    Inventors: Jen-Chien Hsu, Hung-Wen Lu, Chau-Chin Su, Yeong-Jar Chang
  • Publication number: 20090045524
    Abstract: A microelectronic package includes a lower unit having a lower unit substrate with conductive features and a top and bottom surface. The lower unit includes one or more lower unit chips overly/ing the top surface of the lower unit substrate that are electrically connected to the conductive features of the lower unit substrate. The microelectronic package also includes an upper unit including an upper unit substrate having conductive features, top and bottom surfaces and a hole extending between such top and bottom surfaces. The upper unit further includes one or more upper unit chips overlying the top surface of the upper unit substrate and electrically connected to the conductive features of the upper unit substrate by connections extending within the hole. The upper unit may include an upper unit encapsulant that covers the connections of the upper unit and the one or more upper unit chips.
    Type: Application
    Filed: August 16, 2007
    Publication date: February 19, 2009
    Applicant: Tessera, Inc.
    Inventors: IIyas Mohammed, Belgacem Haba, Sean Moran, Wei-Shun Wang, Ellis Chau, Christopher Wade
  • Patent number: 7492017
    Abstract: A process is described for manufacturing an improved PMOS semiconductor transistor. Recesses are etched into a layer of epitaxial silicon. Source and drain films are deposited in the recesses. The source and drain films are made of an alloy of silicon and germanium. The alloy is epitaxially deposited on the layer of silicon. The alloy thus has a lattice having the same structure as the structure of the lattice of the layer of silicon. However, due to the inclusion of the germanium, the lattice of the alloy has a larger spacing than the spacing of the lattice of the layer of silicon. The larger spacing creates a stress in a channel of the transistor between the source and drain films. The stress increases IDSAT and IDLIN of the transistor. An NMOS transistor can be manufactured in a similar manner by including carbon instead of germanium, thereby creating a tensile stress.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: February 17, 2009
    Assignee: Intel Corporation
    Inventors: Anand Murthy, Robert S. Chau, Tahir Ghani
  • Publication number: 20090038850
    Abstract: A steering tool is movable by a drill string to form an underground bore along an intended path. A sensing arrangement of the steering tool detects its pitch and yaw orientations at a series of spaced apart positions along the bore, each position is characterized by a measured extension of the drill string. The steering tool further includes a receiver. At least one marker is positioned proximate to the intended path, for transmitting a rotating dipole field to expose a portion of the intended path to the field for reception by the receiver. The detected pitch orientation, the detected yaw orientation and the measured extension of the drill string are used in conjunction with magnetic information from the receiver to locate the steering tool. The steering tool may automatically use the magnetic information when it is available. A customized overall position determination accuracy can be provided along the intended path.
    Type: Application
    Filed: August 7, 2007
    Publication date: February 12, 2009
    Inventors: Guenter W. Brune, Albert W. Chau, Rudolf Zeller, John E. Mercer
  • Publication number: 20090042405
    Abstract: A method for making a semiconductor device is described. That method comprises forming a first dielectric layer on a substrate, a trench within the first dielectric layer, and a second dielectric layer on the substrate. The second dielectric layer has a first part that is formed in the trench and a second part. After a first metal layer with a first workfunction is formed on the first and second parts of the second dielectric layer, part of the first metal layer is converted into a second metal layer with a second workfunction.
    Type: Application
    Filed: June 12, 2008
    Publication date: February 12, 2009
    Inventors: Mark L. Doczy, Justin K. Brask, Jack Kavalieros, Uday Shah, Matthew V. Metz, Suman Datta, Ramune Nagisetty, Robert S. Chau
  • Publication number: 20090039446
    Abstract: A semiconductor device is described. That semiconductor device comprises a high-k gate dielectric layer that is formed on a substrate that applies strain to the high-k gate dielectric layer, and a metal gate electrode that is formed on the high-k gate dielectric layer.
    Type: Application
    Filed: October 7, 2008
    Publication date: February 12, 2009
    Inventors: Matthew V. Metz, Suman Datta, Mark L. Doczy, Justin K. Brask, Jack Kavalieros, Robert S. Chau
  • Patent number: 7490275
    Abstract: A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive circuit. A similar pattern of information is generated in the receive circuit and used as a reference. The receive circuit compares the patterns. Any differences between the patterns are observable. In one embodiment, a linear feedback shift register (LFSR) is implemented to produce patterns. An embodiment of the present disclosure may be practiced with various types of signaling systems, including those with single-ended signals and those with differential signals. An embodiment of the present disclosure may be applied to systems communicating a single bit of information on a single conductor at a given time and to systems communicating multiple bits of information on a single conductor simultaneously.
    Type: Grant
    Filed: November 13, 2006
    Date of Patent: February 10, 2009
    Assignee: Rambus Inc.
    Inventors: Jared Zerbe, Pak Shing Chau, William Franklin Stonecypher
  • Patent number: 7488032
    Abstract: An attachment joint can provide in combination a plastic over-fender member connectable to a fender of a motor vehicle, a plastic fascia member connectable to a fender, and a complementary attachment coupling located between the over-fender member and the fascia member for interlocking engagement with one another and for holding the over-fender member with respect to the fascia member in at least two directions. The coupling can have a first mating portion molded with the over-fender member and a second mating portion molded with the fascia member. The first and second mating portions can define a hook and slot joint combination.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: February 10, 2009
    Assignee: Nissan Technical Center North America, Inc.
    Inventors: Yogesh Thakar, Chau Chaay, Nandkumar Rangnekar, Richard Eschebach
  • Patent number: 7489527
    Abstract: A DC/DC converter includes an input filter, a half-bridge converter without PWM (Pulse Width Modulation) control function, a synchronous rectifier, an output capacitor, and a DC transformer. The DC transformer includes a magnetic core, a primary winding, a first secondary winding, and a second secondary winding. The magnetic core of the DC transformer includes a first leg, a second leg having a first air gap, and a third leg having a second air gap. The first secondary winding is wound on the first leg and the second leg, and induces a first inductance by the first air gap. The second secondary winding is wound on the first leg and the third leg, and induces a second inductance by the second air gap.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: February 10, 2009
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Chi-Hsiung Lee, Chau-Tung Fan-Chiang
  • Publication number: 20090035701
    Abstract: A photolithography process using a photoresist is as following. A substrate is provided for coating a photoresist thereon to form a photoresist layer and the photoresist is formed by mixing photocatalyst particles and polymer binder in a solvent. The photoresist layer is well-adhesive and has good mechanical strength. A light is illuminated on the photoresist layer through a photo mask having a pre-designed pattern thereon. Then, the portion of the photoresist layer where the light projects is removed by water or another environment-friendly solvent so as to reduce the harmful waste produced in the processes.
    Type: Application
    Filed: October 9, 2007
    Publication date: February 5, 2009
    Inventors: Chau-Kuang Liau, Wen-Wei Chou, Jung-Kang Wu
  • Patent number: 7486592
    Abstract: An optical head to access data on an optical recording medium, which has two data storage densities, includes two sets of optical path systems to provide two optical paths that are crossed. Each optical path system includes a laser light generation unit, a light guiding unit, a converging objective lens and a photo detector. The light guiding unit is located on the optical path of the laser light generation unit, to direct the laser light to pass through the converging objective lens and focus on the data side of the optical recording medium to carry optical data signals from the data side. The laser light returns to the light guiding unit and travels along the optical path and is received by the photo detector.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: February 3, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Chun-Chieh Huang, Chen-I Kuo, Hsiang-Chieh Yu, Jau-Jiu Ju, Chi-Lone Chang, Yuan-Chin Lee, Chau-Yuan Ke
  • Patent number: 7485536
    Abstract: A method including forming a channel region between source and drain regions in a substrate, the channel region including a first dopant profile; and forming a barrier layer between the channel region and a well of the substrate, the barrier layer including a second dopant profile different from the first dopant profile. An apparatus including a gate electrode on a substrate; source and drain regions formed in the substrate and separated by a channel region; and a barrier layer between a well of the substrate and the channel region, the barrier layer including a dopant profile different than a dopant profile of the channel region and different than a dopant profile of the well.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: February 3, 2009
    Assignee: Intel Corporation
    Inventors: Been-Yih Jin, Brian S. Doyle, Robert S. Chau, Jack T. Kavalieros
  • Patent number: 7485503
    Abstract: A Group III-V Semiconductor device and method of fabrication is described. A high-k dielectric is interfaced to a confinement region by a chalcogenide region.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: February 3, 2009
    Assignee: Intel Corporation
    Inventors: Justin K. Brask, Suman Datta, Mark L. Doczy, James M. Blackwell, Matthew V. Metz, Jack T. Kavalieros, Robert S. Chau
  • Publication number: 20090029492
    Abstract: A method of making a light emitting diode (LED) is disclosed. The LED of the present invention comprises a semiconductor layer of a first polarity, an active layer, and a semiconductor layer of a second polarity stacked from bottom to up, wherein a stacked structure at least composed of the active layer and the semiconductor layer of the second polarity have a side with a wave-shape border in a top view of the LED and/or at least one valley, thereby increasing the efficiency of emitting the light to the outside of the LED.
    Type: Application
    Filed: August 29, 2008
    Publication date: January 29, 2009
    Applicant: Epistar Corporation
    Inventors: Chuan-Cheng Tu, Pao-I Huang, Jen-Chau Wu
  • Publication number: 20090030301
    Abstract: A method of examining cardiac electromagnetic activity over a heart for diagnosing the cardiac functions of the heart is disclosed. The method includes collecting a plurality of sets of spatially distributed, time-varying magnetic field signals of the heart of a subject, wherein the magnetic field signals exhibit features of at least a wave, identifying a time corresponding to a local maximum intensity of the magnetic field signals of the wave at each measurement position and plotting a temporal evolution of the local maximum intensity of the magnetic field signals during a time interval of the wave.
    Type: Application
    Filed: July 25, 2008
    Publication date: January 29, 2009
    Inventors: Herng-Er Horng, Chau-chung Wu, Hong-Chang Yang, Shieh-Yueh Yang
  • Publication number: 20090029374
    Abstract: A system and method for identifying high order associations between variables in complex systems that is particularly useful where there is no correlation or weak correlation between variables due to the influence of a third variable, a ternary relationship. The ternary relationship describes how the variation in the pattern of association between a pair of variables, including its sign and strength, is mediated by a third variable. In one embodiment applied to gene expression data, the activity of pairs of correlated genes due to the activity of one or more third genes is shown.
    Type: Application
    Filed: July 7, 2008
    Publication date: January 29, 2009
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventor: Ker-Chau Li
  • Publication number: 20090027055
    Abstract: Location determination is performed using a transmitter including an elongated generally planar loop antenna defining an elongation axis. The elongation axis is positioned along at least a portion of a path. A magnetic field is then generated which approximates a dipole field. Certain characteristics of the magnetic field are then determined at a receiving position radially displaced from the antenna elongation axis. Using the determined certain characteristics, at least one orientation parameter is established which characterizes a positional relationship between the receiving position and the antenna on the path. The magnetic field may be transmitted as a monotone single phase signal. The orientation parameter may be a radial offset and/or an angular orientation between the receiving position and the antenna on the path. The antenna of the transmitter may be inserted into a first borehole to transmit the magnetic field to a receiver inserted into a second borehole.
    Type: Application
    Filed: September 29, 2008
    Publication date: January 29, 2009
    Inventors: Guenter W. Brune, John E. Mercer, Albert W. Chau, Rudolf Zeller
  • Patent number: D586609
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: February 17, 2009
    Assignee: The Brinkmann Corporation
    Inventor: Nam Wai Chau