Abstract: An aspect of the disclosure relates to a power-saving control system using remote-control communication. In this power-saving control system, a remote-control transmitting device is embedded in one of a lighting device, a sensor, and a sensor-embedded program switch, which are installed in a space, so as to remotely control a control target device installed in the corresponding space, and a predetermined control signal such as a power-off command is transmitted to the control target device if no person exists in the space for a predetermined time, or if a measured temperature or the like satisfies a condition, such that the control target device can be remotely controlled.

Abstract: A display device comprises: a display panel; a window; and a first pressure sensor. The display panel comprises: a planar portion; a first curved portion connected to one side of the planar portion; and a first side portion connected to one side of the first curved portion. The window is on the display panel. The first pressure sensor overlaps with the first side portion. Here, the first side portion is in a plane different from each of the planar portion and the first curved portion.

Abstract: Embodiments relate to system for automatically predicting payer response to claims. In an embodiment, the system receives claim data associated with a claim. The system identifies a set of claim features of the claim data, and generates an input vector with at least a portion of the set of claim features. The system applies the input vector to a trained model. A first portion of the neural network is configured to generate an embedding representing the input vector with a lower dimensionality than the input vector. A second portion of the neural network is configured to generate a prediction of whether the claim will be denied based on the embedding. The system provides the prediction for display on a user interface of a user device. The prediction may further include denial reason codes and a response date estimation to indicate if, when, and why a claim will be denied.

Abstract: A display device includes a display area, and a dummy area disposed on one side of the display area, where each of the display area and the dummy area includes a first island pattern and a second island pattern disposed to be spaced apart from each other, and a connection pattern connecting the first island pattern and the second island pattern to each other, and the dummy area includes a dummy common electrode and a common connection electrode electrically connected to the dummy common electrode, which are disposed in each of the first island pattern and the second island pattern thereof.

Abstract: Provided are a method for transmitting and receiving channel state information (CSI) and an apparatus for the same. Specifically, the method includes receiving configuration information related to a CSI report, wherein the configuration information includes first information related with a time domain behavior of the CSI report, and based on the first information, one of (i) periodic, (ii) semi-persistent or (iii) aperiodic may be configured as a behavior of the CSI report in the time domain, receiving second information related with a time domain behavior of the CSI report, wherein the second information may be configured for a time duration including a plurality of specific units based on a specific unit in the time domain, receiving a reference signal for a CSI measurement, performing the CSI measurement based on the reference signal, and reporting the CSI in the time domain based on the first information and the second information.

Abstract: A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern; a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern; an active contact electrically connected to the source/drain pattern; and a silicide layer between the source/drain pattern and the active contact, the source/drain pattern including a body part including a plurality of semiconductor patterns; and a capping pattern on the body part, the body part has a first facet, a second facet on the first facet, and a corner edge defined where the first facet meets the second facet, the corner edge extending parallel to the substrate, the capping pattern covers the second facet of the body part and exposes the corner edge, and the silicide layer covers a top surface of the body part and a top surface of the capping pattern.

Abstract: A semiconductor device includes a substrate including an active region in a first direction, a plurality of channel layers on the active region and disposed in a direction perpendicular to an upper surface of the substrate, a gate electrode respectively surrounding the plurality of channel layers, and a source/drain structure respectively disposed on both sides of the gate electrode in the first direction and connected to each of the plurality of channel layers. The gate electrode extends in a second direction crossing the first direction. The gate electrode includes an overlapped portion in a region of the gate electrode on an uppermost channel layer of the plurality of channel layers. The overlapped portion of the gate electrode overlaps the source/drain structure in the first direction and has a side surface inclined toward the upper surface of the substrate.

Abstract: Apparatuses, systems, and methods for a user equipment device (UE) to determine a default beam for a dedicated PUCCH/SRS in a CC. The UE may determine a pathloss RS has been configured in the CC, e.g., responsive to the UE determining that spatial relationship information for a default transmission beam has not been configured and determine the default beam for transmissions based, at least in part, on the (configured) pathloss RS. Additionally, responsive to determining that the pathloss RS has not been configured in the CC, the UE may determine that no CORESETs/TCI states for a PDSCH in the CC have been configured and determine the default beam for transmissions based, at least in part, on a default transmission beam in another CC, a CC index, a PRACH procedure; a PUSCH transmission; an SRS transmission, and/or a PUCCH transmission.

Abstract: A pixel circuit and a display device including the same are disclosed. The pixel circuit includes: a driving transistor which includes a first electrode connected to a first node, a gate electrode connected to a second node, and a second electrode connected to a third node, and supplies a driving current to a light emitting device; a first transistor that is electrically connected between the first node and the second node; a second transistor that is electrically connected between the first node and a data voltage; a third transistor that is electrically connected between the first node and a power supply line that supplies a high potential voltage; and a storage capacitor that includes a first electrode connected to the high potential voltage and a second electrode connected to the second node.

Abstract: Provided are an organometallic compound represented by Formula 1, an organic light-emitting device including the organometallic compound, and a diagnostic composition including the organometallic compound.

Abstract: A sliding device configured for a vehicle, includes a magnetic module configured to slide on a floor of the vehicle and be fixed to the floor by a magnetic force or unfixed from the floor depending on a change in magnetic circuit due to a rotation of a first magnetic body provided in the magnetic module; a plurality of catching portions formed on the floor, spaced from one another, and provided along a movement route of the magnetic module, and fastening portions provided on the magnetic module and configured to be pressed downward by a first elastic body, the fastening portions being configured to mechanically fasten the magnetic module to the floor by being lowered and caught by the catching portions when the fastening portions are matched with the catching portions while the magnetic module moves.

Abstract: A tray includes a main body portion including a bottom surface portion and a sidewall portion; and a plurality of first guide portions disposed on the bottom surface portion and arranged to be spaced apart from each other in a first direction. Each of the first guide portions includes a first main protruding portion, a first sub-protruding portion which protrudes from the first main protruding portion in the first direction, and a second sub-protruding portion which protrudes from the first main protruding portion in a direction opposite to the first direction, and the first sub-protruding portion and the second sub-protruding portion are alternately arranged in a direction the first main protruding portion extends.

Abstract: An OLED display system having compensation or loss of brightness is provided, including OLED-based display pixels, a sensing system having sensors, a processor having an LIA, an LPF, and analog to digital circuitry connected to each sensor and for providing a sensor signal for each sensor. The processor is adapted to apply a drive signal having a periodic signal to at least one OLED pixel in the display, receive the sensor signal, provide a primary frequency component from the sensor signals using the LIA based on the periodic signal, provide secondary frequency components from the sensor signals using the LPF, convert the secondary frequency components to a digital signal using the ADC, provide the digital signal to the processor as a sensing signal, and determine compensation for the drive signal. A method is also provided.

Abstract: A display device includes: a substrate; a transistor that is disposed on the substrate; an auxiliary electrode that is connected with the transistor; a first electrode that is disposed on a same layer as the auxiliary electrode; a light emitting diode layer that is disposed on the first electrode; and a second electrode that is disposed on the light emitting diode layer, wherein the second electrode contacts the auxiliary electrode at a side surface thereof.

Abstract: A data output control circuit includes a dividing circuit, a timing signal generating circuit and a control signal generating circuit. The dividing circuit divides read enable signals to generate multiple phase clock signals. The timing signal generating circuit generates a plurality of timing signals based on warming-up cycle information and the multiple phase clock signals. The control signal generating circuit generates data output control signals based on the multiple phase clock signals and the plurality of timing signals.

Abstract: A test point adaptor includes a body having a first and second end along a longitudinal axis. The second end includes an outer conductive sleeve. A cap includes a sleeve and a terminator. The body includes a first and second interface at the first and second ends, respectively. A center conductor extends though the body from the first interface toward the second interface. The second end includes a conical contact surface of the outer conductive sleeve. The cap matingly engages the second interface. The second end includes an electrically conductive contact member in electrical contact with the center conductor and a gripping arrangement electrically coupled with the electrically conductive contact member. The cap includes a conical contact surface to engage the conical contact surface of the outer conductive sleeve. A terminator is received by the gripping arrangement, which electrically couples the terminator to the center conductor.

Abstract: A method includes receiving a set of feature models, each feature model of the set of feature models corresponding to a respective feature associated with processing of a component, receiving a set of target properties for processing the component, where the set of target properties includes, for each feature, a respective target, determining, based on the set of feature models, one or more sets of predicted processing parameters in view of the set of target properties, generating one or more candidate process recipes each corresponding to a respective one of the one or more sets of predicted processing parameters, where the one or more candidate process recipes each correspond to a set of predicted properties including, for each feature, a respective predicted property value resulting from component processing, and selecting, from the one or more candidate process recipes, a process recipe for processing the component.

Abstract: Embodiments described herein provide techniques to manage drivers in a user space in a data processing system. One embodiment provides a data processing system configured perform operations, comprising discovering a hardware device communicatively coupled to the communication bus, launching a user space driver daemon, establishing an inter-process communication (IPC) link between a first proxy interface for the user space driver daemon and a second proxy interface for a server process in a kernel space, receiving, at the first proxy interface, an access right to enable access to a memory buffer in the kernel space, and relaying an access request for the memory buffer from the user space driver daemon via a third-party proxy interface to enable the user space driver daemon to access the memory buffer, the access request based on the access right.

Abstract: A display substrate and a display device including the display substrate are disclosed. In one aspect, the display substrate includes a plurality of pixels formed in a substantially circular pixel area and a driving circuit formed in a peripheral area surrounding the pixel area and configured to drive the pixels. A boundary is formed between the pixel area and the peripheral area, and the boundary is substantially concentric with respect to an arc defining the substantially circular pixel area. The driving circuit comprises a conductive pattern having a first side which extends in a peripheral direction crossing the boundary.

Abstract: A memory device according to the present invention comprises: a memory cell array in which memory cells are connected to wordlines and bitlines in a matrix form; and a control circuit for programming the memory cells or controlling a read operation, according to a start address, a burst length, a latency length, and a program or read command which are transmitted from a host, wherein the control circuit may comprise: a pulse generation unit for generating register pulses and counter pulses in synchronization with an operation clock; and a counter that sets the start address in synchronization with the register pulses, counts the number of counter pulses corresponding to the sum of the latency length and the burst length, and increases an address from the start address to the sum of the start address and the burst length.