Abstract: Multiple secure transactions are provided through use of a method that uses customer one-time unique purchase order numbers (“Coupons”) generated by an algorithm that uses a permutated user key and a user insertion key as input variables. A user key (such as a Personal Identification Number, or “PIN”) is combined with a permutation variable that is correlated with a customer sequence number to create the permutated user key. A random number generator is used to generate the user insertion key correlated with the customer sequence number. The algorithm can insert the permutated user key into a user account number through use of the user insertion key. A Coupon is validated by confirming that it is contained in a set of money source Coupons generated by a money source using the user key and a random number generator that is synchronized with the random number used to generate Coupons.

Abstract: A polishing system and associated methods are described for polishing a magnetic disk used in a disk drive system. The polishing system includes a polishing film that is used to polish the magnetic disk. The polishing system also includes an actuator operable to move the polishing film across a surface of the magnetic disk to polish the magnetic disk. The polishing system also includes a pad having at least one protrusion extending from a surface of the pad. The protrusion is configured to contact the polishing film and press the polishing film against the magnetic disk. The protrusion is operable to compress to about the surface of the pad when in contact with the polishing film. Once polishing is complete, the pad retracts from the polishing film and the protrusion extends from the pad, reducing the adhesion force between the pad and the polishing film.

Abstract: A programmable logic device is provided with adaptive equalization circuitry that is programmable in one or more respects. Examples of the programmable aspects of the equalization circuitry are (1) the number of taps used, (2) whether integer or fractional spaced taps are used, (3) what starting values are used in the computation of coefficient values, (4) whether satisfactory coefficient values are computed only once or on an on-going basis, (5) whether an error signal is generated using a decision directed algorithm or using a training pattern, (6) what training pattern (if any) is used, and/or (7) the location of the sampling point in the bit period of the signal to be equalized.

Abstract: A method for mounting a semiconductor device onto a composite substrate, including a submount and a heat sink, is described. According to one aspect of the invention, the materials for the submount and the heat sink are chosen so that the value of coefficient of thermal expansion of the semiconductor device is in between the values of coefficients of thermal expansion of the materials of the submount and the heat sink, the thickness of the submount being chosen so as to equalize thermal expansion of the semiconductor device to that of the surface of the submount the device is mounted on. According to another aspect of the invention, the semiconductor device, the submount, and the heat sink are soldered into a stack at a single step of heating, which facilitates reduction of residual post-soldering stresses.

Abstract: Techniques, systems and computer program products are disclosed for mapping of vascular perfusion territories by placing one or more blood vessels of the vascular perfusion territories in a tag condition and others in a control condition by applying a train of pseudo-continuous radio frequency tagging pulses. In addition, an encoding scheme is applied to fully invert or relax the blood vessels of the vascular perfusion territories. Also, a tagging efficiency is measured for each blood vessel based on the applied encoding scheme. Further, the vascular perfusion territories are separated by using the measured tagging efficiency in a decoding process.

Abstract: Disclosed are various embodiments of high-speed, high-performance, low-noise optical encoders having various means for preventing undesired stray light from reaching light detectors incorporated therein. Structures employed to block stray light in the optical encoders include light barriers, air gap trenches, and coatings disposed between first and second sides of a substrate of the encoder. Also disclosed are compact single track optical encoders having a single dome lens disposed thereover, and dual track triple dome lens optical encoders. Methods of making such optical encoders are also disclosed.

Abstract: A method and system for processing a merchant identification request from a private label payment card issuer is provided. The issuer is communicatively coupled to a multi-party payment card interchange that includes access to a database. The database stores a plurality of historical multi-party payment card transactions.

Abstract: The present invention provides selective migration in a storage network in accordance with a policy. The policy can include rules that establish which objects are migrated from a source file server to a destination file server based on file attributes (e.g., file type, file size, last access time, frequency of access). For example, large multimedia files that consume I/O bandwidth on expensive or critical file servers, without adding much value to enterprise productivity, can be migrated to a commodity or less critical file server.

Abstract: A bandgap reference circuit has trimming-up resistors and trimming-down resistors for bi-directional trimming. PNP transistors have base and collectors grounded and emitters connected to parallel resistors. A difference resistor drives an inverting input of an op amp that drives a transistor that generates the bandgap reference voltage Vbg. A sensing resistor connects Vbg to a splitting node that connects to the non-inverting input through a first parallel resistor. The splitting node also connects through a second parallel resistor to the inverting input. Fuses or switches enable the trimming-up and trimming-down resistors. The trimming-up resistors are in series with the sensing resistor and the trimming-down resistors are in series with an output resistor that connects Vbg to reference voltage Vref. The circuit can be designed for a more typical process since bi-directional trimming allows Vref to be raised or lowered. Many circuits need no trimming when targeted for the typical process.

Abstract: In one aspect, a power supply regulator includes a feedback terminal, a node, a control circuit, a first current source, and a second current source. The node is coupled to the feedback terminal to provide a feedback state signal in response to a feedback current through the feedback terminal. The feedback state signal has feedback states that represent an output of the power supply. The control circuit is to be coupled to a power switch and to receive the feedback state signal to regulate the output of the power supply. The first current source is coupled to the node to provide a first current to the node. The second current source is coupled to the node to selectively remove a second current from the node to modulate the feedback current and to alter the feedback state of the feedback state signal.

Abstract: A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.

Abstract: A camera auto-focuses using computed blur differences between images of a three-dimensional scene. The camera computes the blur difference between two images of the scene acquired at two different picture numbers. The camera uses the computed blur difference to predict a third picture number, where the camera uses the third picture number to auto-focus a camera lens on the scene.

Abstract: An example of a circuit for generating high-voltage switching at an output terminal of the circuit includes a pair of n-type metal oxide semiconductor (NMOS) transistors responsive to input signals to generate a first voltage signal in a preset mode. The circuit also includes a predefined number of n-type cascode stages coupled between the output terminal and the pair of NMOS transistors to enable propagation of the first voltage signal to the output terminal. Further, the circuit includes a predefined number of p-type cascode stages coupled to the output terminal to enable propagation of the first voltage signal to an input voltage supply to the circuit. Furthermore, the circuit includes a first pair of cross-coupled p-type metal oxide semiconductor (PMOS) transistors coupled to the input voltage supply. The circuit includes a pair of PMOS transistors, coupled between the first pair of cross-coupled PMOS transistors and the p-type cascode stage.

Abstract: A network device includes a network port, at least one register, and a network information receiver. The network port is configured to send and receive data packets. The at least one register contains configuration data related to the network port. The network information receiver is coupled with the network port and is configured to receive the data packet from the network port, extract low level data from the data packet, and update the at least one register based on the low level data.

Abstract: A modified blackjack card game using 6 or 8 decks of standard playing cards without jokers, Craps Blackjack is playing in a live casino game table and electronic device, such as computer, slot machine, video game, etc. and using two steps wagering strategies, win or lose at two initial cards and continue to play or fold the hand. It is a card game combined the playing method of craps, poker and blackjack. It provides optional side bets, dragon's head and phoenix's tail, ace-deuce, ace-ace, any eleven, any seven, and six-six and two main bets, Craps Blackjack and Any Craps.

Abstract: A drainage pump has an impeller, a motor for driving the impeller, and a volute housing the impeller. The volute has an end wall, a side wall, an inlet, and an outlet. The side wall extends from the end wall. The side wall and the end wall cooperatively define a pump chamber. The inner surface of the side wall has at least one interfering surface for mixing of fluid flowing through the volute.

Abstract: In some embodiments, the invention involves information routing in networks, and, more specifically, to defining a framework using swarm intelligence and utilization of the defined framework for routing information in the network, especially for cloud computing applications. In an embodiment, information about available information/services is pushed to network nodes using information packets (ants). Nodes requiring services send query packets (ants) and a node may send a response to a query ant when information is available. Ants may be forwarded throughout the network based on popularity of nodes, freshness of information/requests, routing table information, and requests or interest by consumer nodes captured in information routing table. Other embodiments are described and claimed.

Abstract: A fluid control platform that may control various fluid control components and is scalable by connecting with additional substantially identical platforms, as well as related systems, methods of manufacturing the same, and methods of fluid control are disclosed. the platform may include a programmable controller, a power supply, a data input, a data output device, and/or a networking connection, among other things. A coordinated fluid control system may include multiple networked platforms, which may be networked to each other in, for example, a ring. The programmable controller may be provided with hardware that permits operation of each of a plurality of fluid control components, some of which may be intelligent fluid control components.

Abstract: A method of modulating immune response in an animal is disclosed. Such a method interacting the immature dendritic cells from the animal with an antigen ex vivo so that the immature dendritic cells present the antigen on their surfaces, inducing maturation of the immature dendritic cells ex vivo, and contacting the mature dendritic cells ex vivo with a modulator comprising TRANCE, conservative variants thereof, fragments thereof, analogs or derivatives thereof, or a fusion protein comprising the amino acid sequence of TRANCE, conservative variants thereof, or fragments thereof. After contacting the modulator ex vivo, the mature dendritic cells are introduced into the animal. As a result, immune response in the animal towards the antigen is modulated relative to the immune response against the antigen in an animal in which dendritic cells did not interact with the antigen ex vivo, and did not contact a modulator ex vivo.

Abstract: A method of forming an integrated circuit includes forming a gate structure over a substrate. Portions of the substrate are removed to form recesses adjacent to the gate structure. A dopant-rich layer having first type dopants is formed on a sidewall and a bottom of each of the recesses. A silicon-containing material structure is formed in each of the recesses. The silicon-containing material structure has second type dopants. The second type dopants are opposite to the first type dopants.