Patents by Inventor On Yung

On Yung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130126913
    Abstract: A thin multi-layer LED array engine is provided, which includes a substrate having a phosphor layer and a silica gel protection layer formed thereon. The phosphor layer is disposed on LED dices and makes direct contact with the substrate, and the silica gel protection layer is disposed on the phosphor layer. The LED dices are covered with the phosphor layer, and thereby the phosphor particles in the phosphor layer can be uniformly dispersed around the LED dices, so that the narrow color temperature distribution can be achieved. Furthermore, the phosphor layer makes direct contacts with the substrate, and thereby heat generated in the phosphor layer can be effectively dissipated through the substrate, and thereby the reliability of the optical components can be increased.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 23, 2013
    Inventors: Jon-Fwu Hwu, Yung-Fu Wu, Kui-Chiang Liu
  • Publication number: 20130127668
    Abstract: A multi-band antenna is disclosed and comprises a substrate and an electro-conductive layer. The electro-conductive layer comprises: a feed-in terminal; a ground terminal; a connecting portion extended forward from the feed-in terminal; a first high frequency portion extended leftward from the connecting portion for controlling a third frequency band; a low frequency portion bent and extended leftward from the connecting portion for controlling a first frequency band and a second frequency band; and a second high frequency portion extended rightward from the connecting portion for controlling a fourth frequency band. Furthermore, the second high frequency portion is connected with the ground terminal and wider than the first high frequency portion; and harmonic oscillations are generated between the second and first high frequency portions to control a fifth frequency band. Hence, the multi-band antenna of the present invention can meet the requirement of various communication standards.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 23, 2013
    Applicant: Cheng Uei Precision Industry Co., LTD.
    Inventors: Ching-hsiang Ko, Kai Shih, Lan-yung Hsiao, Jia-hung Su
  • Publication number: 20130132913
    Abstract: Apparatus includes a machine readable storage medium for storing a template library having at least one template. The template is to include a first layout representation of at least one pattern to be formed by multi-patterning a single layer of an IC. The pattern has a plurality of portions to be formed using a plurality of respectively different photomasks. The first layout representation includes data identifying on which photomask each portion is to be located. An electronic design automation (EDA) tool includes a processor configured to receive a hardware description language representation of at least a part of a circuit and generate a second layout representation of the part of the circuit having a plurality of polygons. The EDA tool has a matching module that identifies and outputs an indication of whether one or more of the plurality of portions matches a subset of the plurality of polygons.
    Type: Application
    Filed: November 23, 2011
    Publication date: May 23, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Min FU, Yung-Fong LU, Wen-Ju YANG, Chin-Chang HSU
  • Publication number: 20130132731
    Abstract: An access control system and an access control method thereof are provided. The access control system comprises a handheld device, an access control server and a terminal recording device. The handheld device has a user identification. The access control server is configured to store a user identification set, connect to the handheld device within a first time interval, determine that the user identification is included in the user identification set, generate a one-time password (OTP) seed set, and transmit the OTP seed set to the handheld device. The terminal recording device connects to the handhold device within a second time interval, and performs a two-way identification certification with the handheld device according to the OTP seed set so that the handheld device performs a data access to the terminal recording device after achieving the two-way identification certification.
    Type: Application
    Filed: December 13, 2011
    Publication date: May 23, 2013
    Inventors: He-Ming Ruan, Chin-Laung Lei, Yung-Chih Liu
  • Publication number: 20130128220
    Abstract: The instant disclosure relates to a pair of eyeglasses, which includes an eyeglass frame and two temple arms pivotally connected thereto. Two shoulder portions are arranged on opposite ends of the eyeglass frame. Each one of the shoulder portions has an upper wall, a lower wall, and a shaft member. A receiving space is defined for each one of the shoulder portions. An inner flap is extended from the eyeglass frame toward the receiving space for each one of the shoulder portions. Each one of the temple arms has an anchoring section and an ear-resting section. Each one of the anchoring section has an engaging portion and an abutting portion. Each one of the temple arms can be at a closed position or an open position. At the open position, each one of the abutting portions is abutted to the corresponding flap.
    Type: Application
    Filed: November 18, 2011
    Publication date: May 23, 2013
    Inventor: YUNG-AN CHEN
  • Publication number: 20130127587
    Abstract: A co-fired multi-layer stack chip resistor is provided. The co-fired multi-layer stack chip resistor includes a ceramic substrate and a multi-layer stack resistance structure monomer. The ceramic substrate is formed by stacking multiple layers of the ceramic membranes, wherein the ceramic membranes is formed of a bearing membrane and a porcelain slurry with the solvent, the binder and the dispersant. The multi-layer stack resistance structure monomer is stacked on the ceramic substrate, and includes multiple bearing membranes and multiple resistive layers, wherein each resistive layer is formed on the surface of the corresponding bearing membrane, the resistive layers are parallel to each other, and the contiguous resistive layers are stacked with the interval of the predetermined distance along the vertical direction.
    Type: Application
    Filed: June 21, 2012
    Publication date: May 23, 2013
    Applicant: PROSPERITY DIELECTRICS CO., LTD.
    Inventors: YUNG CHENG TSAI, CHING JEN TSAI, TUNG YI CHOU, HUNG CHUN WU
  • Publication number: 20130129967
    Abstract: An improved molded door skin of a synthetic door is disclosed to have a recessed portion for removably installing a replaceable panel thereon, by changing the replaceable panel with another one having different patterns, the molded door skin is therefore variegated; the molded door skin further has a receiving groove circling the recessed portion for receiving a batten having decorative effects, by combinations of different battens with different fashionable replaceable panels can better improve the molded door skin in decoration and esthetics.
    Type: Application
    Filed: November 23, 2011
    Publication date: May 23, 2013
    Applicant: NAN YA PLASTICS CORPORATION
    Inventor: Kuei Yung WANG CHEN
  • Publication number: 20130127510
    Abstract: An isolation interface circuit is disclosed. The isolation interface circuit comprising a transmitting circuit and a receiving circuit. The transmitting circuit configured to receive a first serial interface signal and a second serial interface signal for generating a differential polarity pulse signal. The receiving circuit configured to receive the differential polarity pulse signal for generating the first serial interface signal and the second serial interface signal. The differential polarity pulse signal are generated in response to the first serial interface signal and the second serial interface signal. The first serial interface signal and the second serial interface signal are generated in accordance with the differential polarity pulse signal. In a period, only one of the transmitting circuit and the receiving circuit can be enabled.
    Type: Application
    Filed: November 21, 2012
    Publication date: May 23, 2013
    Inventor: Ta-Yung Yang
  • Publication number: 20130126859
    Abstract: A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.
    Type: Application
    Filed: January 20, 2012
    Publication date: May 23, 2013
    Applicant: Industrial Technology Research Institute
    Inventors: Yung-Hui Yeh, Chih-Ming Lai
  • Publication number: 20130127018
    Abstract: A semiconductor wafer has a plurality of semiconductor die distributed over a surface area. The semiconductor die are singulated from the semiconductor wafer. The semiconductor die are mounted to a carrier to form a reconstituted semiconductor wafer. The carrier has a surface area 10-50% larger than the surface area of the semiconductor wafer. The number of semiconductor die mounted to the carrier is greater than a number of semiconductor die singulated from the semiconductor wafer. The reconstituted wafer is mounted within a chase mold. The chase mold is closed with the semiconductor die disposed within a cavity of the chase mold. An encapsulant is dispersed around the semiconductor die within the cavity under temperature and pressure. The encapsulant can be injected into the cavity of the chase mold. The reconstituted wafer is removed from the chase mold. An interconnect structure is formed over the reconstituted wafer.
    Type: Application
    Filed: February 3, 2012
    Publication date: May 23, 2013
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yoke Hor Phua, Yung Kuan Hsiao
  • Publication number: 20130127795
    Abstract: A display apparatus and a control method thereof are provided. The display apparatus includes a display panel, a detection circuit, and a control circuit. The display panel is configured to display images. The detection circuit is configured to detect a noise influencing a display apparatus, and generate a detection signal in response to the noise when the noise is detected. The control circuit is coupled to the detection circuit and the display panel, and configured to maintain an image displayed by the display panel according to the detection signal until the noise disappears. In this way, when the display apparatus is influenced by a noise, the display panel can keep displaying an image displayed before the influence.
    Type: Application
    Filed: February 6, 2012
    Publication date: May 23, 2013
    Applicant: NOVATEK MICROELECTRONICS CORP.
    Inventors: Chih-Yung Hsu, Kai-I Dai, Ying-Neng Huang, Wan-Ju Chang
  • Patent number: 8446869
    Abstract: An operation method of the femto BS includes configuring a subframe set including at least two types of subframes among subframes having predefined different structures, and, if a duration of a subframe carrying the subframe set arrives, transmitting one of the subframes included in the subframe set according to predefined order. The subframes having the predefined different structures include a first type subframe including a synchronization signal and a Master Information Block (MIB), a second type subframe including the synchronization signal, a third type subframe including the synchronization signal and system information, a fourth type subframe including the synchronization signal, the MIB, and the system information, and a fifth type subframe including the system information.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: May 21, 2013
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Ju-Mi Lee, Yung-Soo Kim, Joon-Young Cho, Ju-Ho Lee, Jong-Hyung Kwun, Chan-Ho Min, Young-Hyun Jeon
  • Patent number: 8445936
    Abstract: An integrally formed high-efficient multi-layer light-emitting device is provided, which includes a heat dissipation seat, a plurality of light-emitting dies, and a lead frame. The heat dissipation seat includes a chamber having an accommodating space, and a groove having two inclined inner sidewalls is formed around the periphery of a bottom of the chamber, The groove is very fine so that only very small amounts of the phosphor and silicone are used for filling the groove and covering the light-emitting dies, and thereby the material cost and the manufacturing cost are greatly reduced. The light can be reflected out of the chamber so that the brightness and the evenness of the light output will be improved.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: May 21, 2013
    Assignee: Gem Weltronics TWN Corporation
    Inventors: Jon-Fwu Hwu, Yung-Fu Wu, Kui-Chiang Liu
  • Patent number: 8446182
    Abstract: An output buffer includes a first output transistor, a first switch, a second switch and a third switch. The first output transistor is connected to a first operational voltage for outputting the first operational voltage as the data signal. The first switch is connected to a bulk of the first output transistor for receiving an enable signal. The second switch is connected to the first switch and a second operational voltage for receiving the enable signal, wherein the second operational voltage is lower than the first operational voltage. The third switch includes a first terminal connected to the bulk of the first output transistor, a control terminal connected to the first switch, and a second terminal connected to the first operational voltage.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: May 21, 2013
    Assignee: Macronix International Co., Ltd.
    Inventor: Yung-Feng Lin
  • Patent number: 8445982
    Abstract: A polysilicon structure and method of forming the polysilicon structure are disclosed, where the method includes a two-step deposition and planarization process. The disclosed process reduces the likelihood of defects such as voids, particularly where polysilicon is deposited in a trench having a high aspect ratio. A first polysilicon structure is deposited that includes a trench liner portion and a first upper portion. The trench liner portion only partially fills the trench, while the first upper portion extends over the adjacent field isolation structures. Next, at least a portion of the first upper portion of the first polysilicon structure is removed. A second polysilicon structure is then deposited that includes a trench plug portion and a second upper portion. The trench is filled by the plug portion, while the second upper portion extends over the adjacent field isolation structures. The second upper portion is then removed.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: May 21, 2013
    Assignee: Macronix International Co., Ltd.
    Inventors: Chin-Tsan Yeh, Chun-Fu Chen, Yung-Tai Hung, Chin-Ta Su
  • Patent number: 8448011
    Abstract: A data processing system and an adjusting method thereof are disclosed. The data processing system includes a processor, a clock generator, a monitoring module and a determining module. When a target program is processed, the monitoring module monitors a first loading level of the processor, and transmits the first loading level to the determining module for recording. Furthermore, when a present program is processed, the monitoring module monitors a second loading level of the processor, and transmits the second loading level to the determining module. The determining module determines whether the second loading level matches with the first loading level within a preset period, and if it matches, the determining module generates and transmits a control signal to the clock generator, thereby making the clock generator generates a first clock signal to the processor, so as to increase the operating frequency of the processor.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: May 21, 2013
    Assignee: ASUSTeK Computer Inc.
    Inventors: Bing Min Lin, Chih Shien Lin, Chih Yung Peng
  • Patent number: 8446524
    Abstract: The disclosure is regarding an apparatus and a method for frame rate conversion. The frame rate conversion apparatus, for receiving at least two input frames to generate at lease one output frame, comprises a motion estimation module for generating a candidate list comprising regional motion vectors and temporal motion vectors from the at least two input frames and choosing a winner motion vector from the candidate list, a motion compensation module for generating the at lease one output frame according to the winner motion vector, a frame feature extraction module for generating fade-in/out information or a logo detection information from the at least two input frames, and an adaptive MEMC control module for deciding a weighting of the winner motion vector according to the fade-in/out information or the logo detection information.
    Type: Grant
    Filed: June 19, 2011
    Date of Patent: May 21, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yung-Chin Chen, Yun Gong, I-Ming Pao
  • Patent number: 8443604
    Abstract: A memory alloy spring engine includes a spring (1) made from a memory alloy, a driving stem (6) and a heat resource. The memory spring (1) is connected to the driving stem (6) and configured to move the driving stem (6) when being compressed and deformed by an external force, to restore to an original shape after being compressed and then heated, and to move the driving stem (6) again after being cooled and then compressed and deformed again so as to move the driving stem (6) up and down along therewith in continuous repeating cycles. The memory spring is equipped with a polyhedral glass ball (3), the polyhedral glass ball (3) is configured to collect sunlight from different angles and to conduct solar heat to the memory spring (1) so that the memory spring is heated and thereby restored to the original shape. The engine may utilize natural heat energy (solar energy or geo-heat) and combustible fuel alone or in combination to generate electricity according to different locations or different times.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: May 21, 2013
    Inventor: Waikeung Yung
  • Patent number: 8448138
    Abstract: Technologies are described herein for recording user-driven events within a computing system. An interface is established between a recorder application and an input method editor (“IME”) executing on the computer system. Through the use of the interface, the recorder application can obtain and record data identifying user-driven events that are performed within the IME. An interface is also established between the recorder application and a UI control that does not expose data regarding user-driven events through standard system calls. Through the use of the interface, the recorder application can obtain and record data identifying user-driven events detected at the UI control. The recorder application can also provide data identifying the recorded user-driven events directly to a bug tracking application program for inclusion in a bug database.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: May 21, 2013
    Assignee: Microsoft Corporation
    Inventors: Wen-Chieh Chang, Shu-Fang Huang, Yan-Mei Jiang, Ling-Ya Huang, Li Wen, Chih-Yung Chen, Michael Jen-Chiung Chang, Hung Ju King, Yuli Huang
  • Patent number: 8443909
    Abstract: A fire shutter adapted to close off an area comprises a shutter curtain movable from an up position to a closed position, wherein the shutter curtain closes off the area when in the closed position, and at least one retractable guide, movable from a retracted position to an extended position and having a camber. The shutter curtain engages the at least one retractable guide as the shutter curtain moves from the up position toward the closed position, biasing the at least one retractable guide to the retracted position, and in the closed position the shutter curtain engages the camber and allows the at least one retractable guide to move to the extended position. The shutter curtain can also comprise front slats and rear slats, and an insulation package can be deployable from a non-deployed position to a deployed position within a space between the front slats and the rear slats.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: May 21, 2013
    Assignee: Gliderol Doors (S) Pte Ltd
    Inventor: Lok Yung Wong