Patents by Inventor Onur AKER

Onur AKER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11437907
    Abstract: Disclosed herein is a charge pump architecture in which boosting capacitors of adjacent stages are connected only by NMOS type transistors and comprising a first stage receiving a first voltage and outputting an internal voltage; a second stage receiving the internal voltage and outputting a second voltage at an output terminal, and an auxiliary stage connected to the output terminal, the first stage and second stage including a first type of MOS transistors transferring the voltage from input node internal boosting nodes and being cross-coupled; a second type of MOS transistors with their gate biased by a third type of MOS transistors and fourth type of MOS transistors; the third type of MOS transistors connecting the gate of the second type of MOS transistors; and the fourth type of MOS transistors connecting the gate of the second type of MOS transistors.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: September 6, 2022
    Assignee: SK hynix Inc.
    Inventors: Onur Aker, Marco Passerini
  • Publication number: 20220255423
    Abstract: Disclosed herein is a charge pump architecture in which boosting capacitors of adjacent stages are connected only by NMOS type transistors and comprising a first stage receiving a first voltage and outputting an internal voltage; a second stage receiving the internal voltage and outputting a second voltage at an output terminal, and an auxiliary stage connected to the output terminal, the first stage and second stage including a first type of MOS transistors transferring the voltage from input node internal boosting nodes and being cross-coupled; a second type of MOS transistors with their gate biased by a third type of MOS transistors and fourth type of MOS transistors; the third type of MOS transistors connecting the gate of the second type of MOS transistors; and the fourth type of MOS transistors connecting the gate of the second type of MOS transistors
    Type: Application
    Filed: August 30, 2021
    Publication date: August 11, 2022
    Inventors: Onur AKER, Marco PASSERINI