Patents by Inventor Or Chen

Or Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240379414
    Abstract: A method includes etching a dielectric layer to form an opening. A first conductive feature underlying the dielectric layer is exposed to the opening. A sacrificial spacer layer is deposited to extend into the opening. The sacrificial spacer layer is patterned. A bottom portion of the sacrificial spacer layer at a bottom of the opening is removed to reveal the first conductive feature, and a vertical portion of the sacrificial spacer layer in the opening and on sidewalls of the dielectric layer is left to form a ring. A second conductive feature is formed in the opening. The second conductive feature is encircled by the ring, and is over and electrically coupled to the first conductive feature. At least a portion of the ring is removed to form an air spacer.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Inventors: Yi-Nien Su, Yu-Yu Chen, Kuan-Wei Huang, Li-Min Chen
  • Publication number: 20240374476
    Abstract: A method of generating hydrogen gas on skin can include contacting a solid base metal surface with an aqueous skin care formulation to coat the solid base metal surface with the aqueous skin care formulation. A portion of the aqueous skin care formulation can be catalytically converted to molecular hydrogen (H2) at the solid base metal surface. The skin can be massaged using the formulation-coated solid base metal surface to generate H2 on the skin.
    Type: Application
    Filed: May 13, 2024
    Publication date: November 14, 2024
    Inventors: Eugene P. PITTZ, Chen CHEN
  • Publication number: 20240379623
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor structure, a dielectric bonding structure, a second semiconductor structure, and a through via structure. The first semiconductor structure includes a first substrate and a first back-end-of-line (BEOL) structure over the first substrate. The dielectric bonding structure is over the first semiconductor structure. The second semiconductor structure is over the dielectric bonding structure. The second semiconductor structure includes a second BEOL structure over the dielectric bonding structure and a second substrate over the second BEOL structure. The through via structure penetrates the second semiconductor structure and the dielectric bonding structure to connect the first BEOL structure and the second BEOL structure. A method for forming a semiconductor package structure is also provided.
    Type: Application
    Filed: May 7, 2024
    Publication date: November 14, 2024
    Inventors: WENLIANG CHEN, CHIN-HUNG LIU, KEE-WEI CHUNG, RU-YI CAI
  • Publication number: 20240379494
    Abstract: A semiconductor structure includes: a substrate; a package attached to a first surface of the substrate, where the package includes: an interposer, where a first side of the interposer is bonded to the first surface of the substrate through first conductive bumps; dies attached to a second side of the interposer opposing the first side; and a molding material on the second side of the interposer around the dies; a plurality of thermal interface material (TIM) films on a first surface of the package distal from the substrate, where each of the TIM films is disposed directly over at least one respective die of the dies; and a heat-dissipation lid attached to the first surface of the substrate, where the package and the plurality of TIM films are disposed in an enclosed space between the heat-dissipation lid and the substrate, where the heat-dissipation lid contacts the plurality of TIM films.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 14, 2024
    Inventors: Yu Chen Lee, Shu-Shen Yeh, Chia-Kuei Hsu, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20240380108
    Abstract: A reconfigurable antenna, a control method therefor, a router, and a signal transceiving device are disclosed. The reconfigurable antenna may include: a horizontal polarization antenna including a patch structure arranged on an upper surface of a first dielectric plate and a first reflector arranged on a lower surface of the first dielectric plate; a vertical polarization antenna arranged below the horizontal polarization antenna and including a third dielectric plate and a fourth dielectric plate which are perpendicular to the first dielectric plate; and an antenna board, including a fifth dielectric plate.
    Type: Application
    Filed: July 13, 2022
    Publication date: November 14, 2024
    Inventors: Jianqiang CHEN, Fei CAO, Dianping XU
  • Publication number: 20240379356
    Abstract: A method of forming a semiconductor device includes removing a light-sensitive material from a workpiece utilizing polarized electromagnetic radiation and annealing features on the workpiece utilizing electromagnetic radiation polarized in a different direction than the polarized electromagnetic radiation utilized to remove the light-sensitive material. In some embodiments, the electromagnetic radiation used to anneal the features on the workpiece is not polarized. In some described embodiments, light-sensitive material removed from the workpiece is exhausted from the chamber in which the light-sensitive removal process is carried out before it can deposit on surfaces of the chamber.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Inventors: Tz-Shian CHEN, Li-Ting WANG, Yee-Chia YEO
  • Publication number: 20240375081
    Abstract: A superabsorbent material generally free of organic solvents and having a high overall porosity and a high percentage of micropores are provided. The superabsorbent material is formed from a high-molecular weight linear water-soluble absorbent polymer and a non-reactive or latent crosslinking agent, and contains a plurality of micropores having a size of about 150 ?m or less. The superabsorbent material is formed into a variety of shapes having a high external surface to volume ratio.
    Type: Application
    Filed: October 14, 2022
    Publication date: November 14, 2024
    Inventors: Mark M. Mleziva, Jian Qin, Feng Chen, Wing-Chak Ng, David G. Biggs, Gregory J. Wideman
  • Publication number: 20240378839
    Abstract: The present application provides an image stitching method, apparatus and device based on reinforcement learning and a storage medium. The method includes: acquiring initial calibration parameters, collecting a sample image and position information of a motion platform; setting a negative reward function; acquiring a state set and a negative reward value set according to a randomly generated action set, the initial calibration parameters, the position information of the motion platform and the negative reward function to construct a probability kinematics model; constructing a state value function based on an occurrence probability of the state, and acquiring an optimal action by optimizing the state value function; and acquiring optimized calibration parameters through the optimal action and the initial calibration parameters, and carrying out image stitching on corresponding sample images through the optimized calibration parameters.
    Type: Application
    Filed: July 9, 2024
    Publication date: November 14, 2024
    Inventors: Jian GAO, Junlang LIANG, Lanyu ZHANG, Yuheng LUO, Zhuojun ZHENG, Xin CHEN
  • Publication number: 20240378162
    Abstract: A bridge device for bridging a host device and a data storage device includes a first controller and a second controller. The first controller includes a first transmission interface. The second controller is coupled to the first controller and includes a second transmission interface. The second transmission interface is coupled to the first transmission interface through a bus. The first transmission interface operates in a slave mode and the second transmission interface operates in a master mode. The first transmission interface and the second transmission interface generate multiple transfer data chunks in compliance with a common bridge transfer format to perform transfer operations in dual directions for respectively transferring a command and data between a host device and a data storage device.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 14, 2024
    Applicant: Silicon Motion, Inc.
    Inventors: Chen-Hao Chen, Shih-Hsiang Shen, Hui-Lin Liu
  • Publication number: 20240374944
    Abstract: A battery module capable of suppressing spread of battery fire including a case, a plurality of battery packs, a plurality of temperature sensors, an energy consumption module and a controller. The case forms an accommodation space, and the battery packs is accommodated in the accommodation space. The temperature sensors are dispersedly configured to the accommodation space, and the temperature sensors respectively detect an ambient temperature around configure locations. The controller is coupled to the temperature sensors, and when the ambient temperature detected by one of the temperature sensors is greater than or equal to a first specific temperature range, the controller controls the energy consumption module to consume a battery capacity of at least one battery pack around the one of the temperature sensors.
    Type: Application
    Filed: May 12, 2023
    Publication date: November 14, 2024
    Inventors: Chung-Hsing CHANG, Wen-Yi CHEN, Way-Lung WU, Teng-Chi HUANG, Shi-Cheng TONG, Yong-Han CHEN, Yu-Chun WANG
  • Publication number: 20240379858
    Abstract: In some embodiments, the present disclosure relates to a device. The device includes an active layer arranged over a substrate. A gate electrode is arranged on a first side of the active layer and spaced apart from the active layer by a gate dielectric layer. A passivation structure is arranged on the active layer. A source contact extends through the passivation structure to contact the active layer and a drain contact extends through the passivation structure to contact the active layer. An upper portion of the passivation structure includes silicon carbide.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 14, 2024
    Inventors: Wu-Wei Tsai, Hai-Ching Chen
  • Publication number: 20240376089
    Abstract: A series of 3-hydroxy-5-(isoxazol-5-yl) pyridine formylglycine compounds, a preparation method, a pharmaceutical composition, and the use. A structure of the compounds is shown as formula (I), and the compound derivatives comprise pharmaceutically acceptable salt thereof. The compounds and the pharmaceutical composition thereof have a high inhibition effect on HIF inhibition factors, and the activity can optimally reach the nano-molar concentration level, so that the compounds can be used for preparing a drug for treating fat metabolic diseases.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 14, 2024
    Applicant: CHINA PHARMACEUTICAL UNIVERSITY
    Inventors: Xiaojin ZHANG, Yue WU, Yafen CHEN, Zhihong LI, Linjian ZHANG, Xiang LI
  • Publication number: 20240379558
    Abstract: An interconnection structure, along with methods of forming such, are described. The interconnection structure includes a first portion of a conductive layer, and the conductive layer includes one or more graphene layers. The first portion of the conductive layer includes a first interface portion and a second interface portion opposite the first interface portion, and each of the first and second interface portion includes a metal disposed between adjacent graphene layers. The structure further includes a second portion of the conductive layer disposed adjacent the first portion of the conductive layer, and the second portion of the conductive layer includes a third interface portion and a fourth interface portion opposite the third interface portion. Each of the third and fourth interface portion includes the metal disposed between adjacent graphene layers. The structure further includes a dielectric material disposed between the first and second portions of the conductive layer.
    Type: Application
    Filed: July 19, 2024
    Publication date: November 14, 2024
    Inventors: Shu-Wei LI, Yu-Chen CHAN, Shin-Yi YANG, Ming-Han LEE, Shau-Lin SHUE
  • Publication number: 20240381167
    Abstract: The present application relates to devices and components, including apparatus, systems. and methods for buffer status reporting in wireless networks.
    Type: Application
    Filed: April 11, 2024
    Publication date: November 14, 2024
    Applicant: APPLE INC.
    Inventors: Ping-Heng Kuo, Weidong Yang, Zhibin Wu, Fangli Xu, Ralf Rossbach, Peng Cheng, Yuqin Chen, Naveen Kumar R. Palle Venkata, Sethuraman Gurumoorthy, Haijing Hu, Alexander Sirotkin
  • Publication number: 20240378537
    Abstract: A method may include receiving a login request including a user identifier; accessing a role in a user account associated with the user identifier; presenting a user interface, the user interface including: a service receiver input element presenting a selected service receiver; a service identifier input element presenting a selected service identifier; a graph presentation area; and graph visualization options based on the role in the user account; executing a knowledge graph database query to a knowledge graph database using a combination of the selected service receiver and the selected service identifier; and generating, in the graph presentation area an interactive graph based on tuple results of the knowledge graph database query, the interactive graph including: representations of entities in the tuple results including the selected service receiver and the selected service identifier; and links connecting the representations of entities.
    Type: Application
    Filed: May 10, 2023
    Publication date: November 14, 2024
    Inventors: Matthew Ruble, Eric Bruce Standring, David Newman, Chao Chen, Steven Daryl McCullough, Omar B. Khan, Nikolai Anisimov, Cristian Cocos, Nisha Rama Krishnan
  • Publication number: 20240379429
    Abstract: Some embodiments of the present disclosure provide a method of manufacturing a semiconductor device. The method includes: forming a carrier; forming a sacrificial layer on the carrier; forming a through via on the sacrificial layer, wherein the through via includes a seed layer and a metal feature; disposing a die on the sacrificial layer, wherein the die has a plurality of metal pillars disposed at a side of the die facing away from the sacrificial layer; forming a molding compound on the sacrificial layer to cover and surround the die and the through via; removing a portion of the molding compound and a portion of the through via above the die to expose the metal feature of the through via; and removing the carrier and sacrificial layer to expose the seed layer of the through via.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Inventors: JING-CHENG LIN, YING-CHING SHIH, PU WANG, CHEN-HUA YU
  • Publication number: 20240381032
    Abstract: A double gap double coil driven speaker includes a diaphragm, a permanent magnet having a magnetization, and a magnetic flux conducting device having a magnetic flux conducting path. The magnetic flux conducting device and the permanent magnet together form a magnetic flux loop, wherein the magnetic flux loop has two gaps, and directions of magnetic fields generated in the two gaps are opposite to each other. The speaker further includes a voice coil having two coils wound on an outer surface of the voice coil and the voice coil having one end connected to the diaphragm, wherein the two coils are respectively accommodated in the two gaps. When the two coils conduct currents, the voice coil is displaced to push the diaphragm, wherein, relative to a common cross section of the two gaps, the currents respectively flowing through the two coils are in opposite directions.
    Type: Application
    Filed: May 8, 2023
    Publication date: November 14, 2024
    Applicant: JULUEN ENTERPRISE CO., LTD.
    Inventors: Ching-Hui HUANG, Bing-Qi CHEN, Sze-Yi CHEN, Po-Chang WU
  • Publication number: 20240379629
    Abstract: A display panel including a substrate, multiple display units, an encapsulation layer, and a block strip is disclosed. The display units are disposed over the substrate. The encapsulation layer is disposed over the substrate and between the display units. The block strip is disposed between the encapsulation layer and the substrate, and extends along an edge of the substrate.
    Type: Application
    Filed: December 19, 2023
    Publication date: November 14, 2024
    Applicant: AUO Corporation
    Inventors: Sheng-Chin Wang, Kuan-Hsun Chen
  • Publication number: 20240379796
    Abstract: A semiconductor device includes a plurality of active region structures that each protrude upwards in a vertical direction. The active region structures each extend in a first horizontal direction. The active region structures are separated from one another in a second horizontal direction different from the first horizontal direction. A gate structure is disposed over the active region structures. The gate structure extends in the second horizontal direction. The gate structure partially wraps around each of the active region structures. A conductive capping layer is disposed over the gate structure. A gate via is disposed over the conductive capping layer. A dimension of the conductive capping layer measured in the second horizontal direction is substantially greater than a maximum dimension of the gate via measured in the second horizontal direction.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Inventors: Chia-Wei Chen, Wei Cheng Hsu, Hui-Chi Chen, Jian-Hao Chen, Kuo-Feng Yu, Shih-Hang Chiu, Wei-Cheng Wang, Kuan-Ting Liu, Yen-Ju Chen, Chun-Chih Cheng, Wei-Chen Hsiao
  • Publication number: 20240379670
    Abstract: A semiconductor device includes a substrate with a high voltage region and a low voltage region. A first deep trench isolation is disposed within the high voltage region. The first deep trench isolation includes a first deep trench and a first insulating layer filling the first deep trench. The first deep trench includes a first sidewall and a second sidewall facing the first sidewall. The first sidewall is formed by a first plane and a second plane. The edge of the first plane connects to the edge of the second plane. The slope of the first plane is different from the slope of the second plane.
    Type: Application
    Filed: June 6, 2023
    Publication date: November 14, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ya-Ting Hu, Chih-Yi Wang, Yao-Jhan Wang, Wei-Che Chen, Kun-Szu Tseng, Yun-Yang He, Wen-Liang Huang, Lung-En Kuo, Po-Tsang Chen, Po-Chang Lin, Ying-Hsien Chen