Patents by Inventor Or Danon

Or Danon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250133427
    Abstract: Technologies for network drive test prioritization based on machine learning are disclosed. An example method includes feeding a representation of routes of a target candidate drive test to a trained machine learning model to obtain a drive test prediction, wherein the trained machine learning model is trained based on integrating radio frequency (RF) estimations or predictions with past drive test data. The method also includes sorting a set of candidate drive tests for the communications network including the target candidate drive test, based on drive test predictions associated with each candidate drive test, to determine priorities for executing drive tests; and determining expectation of network usability in accordance with network availability and performance metrics.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 24, 2025
    Inventors: Tomer Danon, Ahmed Alkarboly, Jennings Orcutt, David Ricardo Bentolila Sapiani
  • Patent number: 12248367
    Abstract: Novel and useful system and methods of several functional safety mechanisms for use in an artificial neural network (ANN) processor. The mechanisms can be deployed individually or in combination to provide a desired level of safety in neural networks. Multiple strategies are applied involving redundancy by design, redundancy through spatial mapping as well as self-tuning procedures that modify static (weights) and monitor dynamic (activations) behavior. The various mechanisms of the present invention address ANN system level safety in situ, as a system level strategy that is tightly coupled with the processor architecture. The NN processor incorporates several functional safety concepts which reduce its risk of failure that occurs during operation from going unnoticed. The mechanisms function to detect and promptly flag and report the occurrence of an error with some mechanisms capable of correction as well.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: March 11, 2025
    Inventors: Avi Baum, Daniel Chibotero, Roi Seznayov, Or Danon, Ori Katz, Guy Kaminitz
  • Patent number: 12166256
    Abstract: A method for servicing a duplexer having a cavity resonator defining an opening covered by an RF plate. The RF plate defines an opening through which a pass-band tuning pipe extends and is secured thereto. A collar is attached to one end of the pipe, and at least one steel set screw extends into the interior of the collar, the at least one end having a soft (e.g., brass) tip. A tuning plunger is slidingly positioned within the pass-band tuning pipe. A rod is attached to a first end of the tuning plunger and extends through the collar, the rod being fabricated from a material harder than the tip of the at least one set screw. The at least one set screw is configured for tightening down on the rod to secure the rod and tuning plunger in place. A trimmer capacitor is positioned in the RF plate.
    Type: Grant
    Filed: January 16, 2024
    Date of Patent: December 10, 2024
    Assignee: Northcomm Technologies Group, Ltd.
    Inventor: Mark Lawrence Danon
  • Patent number: 12131792
    Abstract: A method of operating a memory device includes: supplying one or more supply voltages to a memory array; and monitoring the one or more supply voltages, which includes: selecting, from the one or more supply voltages, a selected supply voltage; converting, using an analog-to-digital converter (ADC), an internal reference voltage of the memory device and a scaled version of the selected supply voltage into one or more digital values; generating a calibrated measurement result using the one or more digital values; and determining whether the calibrated measurement result is within a pre-determined range.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: October 29, 2024
    Assignee: INFINEON TECHNOLOGIES LLC
    Inventors: Yoram Betser, Oleg Dadashev, Kobi Danon
  • Patent number: 12124372
    Abstract: A method for reading a shared clock that is stored in a shared storage space of a storage system, the method may include (a) reading by a compute node a cached value of the shared clock when a time gap before a next update of the shared clock exceeds a time threshold, wherein the cached value is cached in the compute node and is valid during an allowable caching period, wherein the shared clock is shared by a group of compute nodes, wherein a default update of the shared clock has a cycle that exceeds the time threshold; and (b) reading by the compute node a read value of the shared clock when the time gap before the next update of the shared clock does not exceed the time threshold, wherein the read value of the shared clock is stored in the shared storage space.
    Type: Grant
    Filed: November 25, 2022
    Date of Patent: October 22, 2024
    Assignee: VAST DATA LTD.
    Inventors: Ilan Ben-Hagai, Avi Goren, Ben Danon
  • Publication number: 20240296145
    Abstract: This disclosure relates to representing and using metadata via graph database. In some aspects, a method includes receiving, at one or more computing devices, first metadata associated with data files from one or more data sources, the first metadata representing a plurality of features of associated data included in the data files, the plurality of features including at least one of a file name, a table name, an attribute, a row name, and a column name; determining relationships among the plurality of features to generate second metadata representing content of the data files; and generating a graph database representing the content of the data files, the graph database including a set of nodes and a set of edges, wherein each node in the set of nodes represents a feature of the plurality of features, and each edge represents a relationship between two nodes in the set of nodes.
    Type: Application
    Filed: March 3, 2023
    Publication date: September 5, 2024
    Inventors: Darshit Gandhi, Tomer Danon, Hamza Nasir Khokhar
  • Publication number: 20240249578
    Abstract: The present disclosure relates to systems and methods for communicating between devices using short-range communication links. More specifically, the present disclosure relates to systems and methods for communicating access-right data between devices for verification or transfer.
    Type: Application
    Filed: April 1, 2024
    Publication date: July 25, 2024
    Applicant: Live Nation Entertainment, Inc.
    Inventors: Benson Truong, Daniel Lewis, Michael Estes, Andrew Pratt, Justin Burleigh, Danon Law
  • Patent number: 11948416
    Abstract: The present disclosure relates to systems and methods for communicating between devices using short-range communication links. More specifically, the present disclosure relates to systems and methods for communicating access-right data between devices for verification or transfer.
    Type: Grant
    Filed: May 2, 2023
    Date of Patent: April 2, 2024
    Assignee: Live Nation Entertainment, Inc.
    Inventors: Benson Truong, Daniel Lewis, Michael Estes, Andrew Pratt, Justin Burleigh, Danon Law
  • Patent number: 11935603
    Abstract: A non-volatile memory has an array of non-volatile memory cells, first reference word lines and second reference word lines, and sense amplifiers. The sense amplifiers read system data, that has been written to supplemental non-volatile memory cells of the first reference word lines, using comparison of the supplemental non-volatile memory cells of the first reference word lines to supplemental non-volatile memory cells of the second reference word lines. Status of erasure of the non-volatile memory cells of the array is determined based on reading the system data.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: March 19, 2024
    Assignee: Infineon Technologies LLC
    Inventors: Amichai Givant, Idan Koren, Shivananda Shetty, Pawan Singh, Yoram Betser, Kobi Danon, Amir Rochman
  • Patent number: 11916275
    Abstract: A duplexer includes a cavity resonator defining an opening covered by an RF plate. The RF plate defines an opening through which a pass-band tuning pipe extends and is secured thereto. A collar is attached to one end of the pipe, and at least one steel set screw extends into the interior of the collar, the at least one end having a soft (e.g., brass) tip. A tuning plunger is slidingly positioned within the pass-band tuning pipe. A rod is attached to a first end of the tuning plunger and extends through the collar, the rod being fabricated from a material harder than the tip of the at least one set screw. The at least one set screw is configured for tightening down on the rod to secure the rod and tuning plunger in place. A trimmer capacitor is positioned in the RF plate.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: February 27, 2024
    Assignee: Northcomm Technologies Group, Ltd.
    Inventor: Mark Lawrence Danon
  • Patent number: 11874900
    Abstract: Novel and useful system and methods of functional safety mechanisms for use in an artificial neural network (ANN) processor. The mechanisms can be deployed individually or in combination to provide a desired level of safety in neural networks. Multiple strategies are applied involving redundancy by design, redundancy through spatial mapping as well as self-tuning procedures that modify static (weights) and monitor dynamic (activations) behavior. The NN processor incorporates functional safety concepts which reduce its risk of failure that occurs during operation from going unnoticed. The mechanisms function to detect and promptly flag and report the occurrence of an error with some mechanisms capable of correction as well. The safety mechanisms cover data stream fault detection, software defined redundant allocation, cluster interlayer safety, cluster intralayer safety, layer control unit (LCU) instruction addressing, weights storage safety, and neural network intermediate results storage safety.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: January 16, 2024
    Inventors: Guy Kaminitz, Ori Katz, Or Danon, Daniel Chibotero, Roi Seznayov, Nir Engelberg, Avi Baum, Itai Resh
  • Publication number: 20240005556
    Abstract: Provided herewith a computer-based method for assessing a location of an object-of-interest (OBIN) in a building site. The method may comprise: acquiring an image of an OBIN captured by an image capturing device (ICD) within the building site; acquiring a position and orientation of the ICD at the time the image was captured; processing the image to identify an observed reference point of the OBIN on the image; and determining spatial coordinates for the observed reference point with respect to the model. Alternatively, the method may comprise: acquiring an image of a building site captured by an ICD; acquiring a position and orientation of the ICD at the time the image was captured; determining an expected position on the image for an object based on a model of the building site; determining an image-based-position of the object; and detecting a discrepancy between the expected position and the image-based position.
    Type: Application
    Filed: May 21, 2021
    Publication date: January 4, 2024
    Inventors: Yakir Sudry, Roy Danon
  • Patent number: 11811421
    Abstract: Novel and useful system and methods of several functional safety mechanisms for use in an artificial neural network (ANN) processor. The mechanisms can be deployed individually or in combination to provide a desired level of safety in neural networks. Multiple strategies are applied involving redundancy by design, redundancy through spatial mapping as well as self-tuning procedures that modify static (weights) and monitor dynamic (activations) behavior. The mechanisms address ANN system level safety in situ, as a system level strategy tightly coupled with the processor architecture. The NN processor incorporates several functional safety concepts that function to detect and promptly flag and report an error with some mechanisms capable of correction as well.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: November 7, 2023
    Inventors: Guy Kaminitz, Roi Seznayov, Daniel Chibotero, Ori Katz, Nir Engelberg, Yuval Adelstein, Or Danon, Avi Baum
  • Publication number: 20230351830
    Abstract: The present disclosure relates to systems and methods for communicating between devices using short-range communication links. More specifically, the present disclosure relates to systems and methods for communicating access-right data between devices for verification or transfer.
    Type: Application
    Filed: May 2, 2023
    Publication date: November 2, 2023
    Applicant: Live Nation Entertainment, Inc.
    Inventors: Benson Truong, Daniel Lewis, Michael Estes, Andrew Pratt, Justin Burleigh, Danon Law
  • Publication number: 20230268023
    Abstract: A method of operating a memory device includes: supplying one or more supply voltages to a memory array; and monitoring the one or more supply voltages, which includes: selecting, from the one or more supply voltages, a selected supply voltage; converting, using an analog-to-digital converter (ADC), an internal reference voltage of the memory device and a scaled version of the selected supply voltage into one or more digital values; generating a calibrated measurement result using the one or more digital values; and determining whether the calibrated measurement result is within a pre-determined range.
    Type: Application
    Filed: July 12, 2022
    Publication date: August 24, 2023
    Inventors: Yoram Betser, Oleg Dadashev, Kobi Danon
  • Publication number: 20230185978
    Abstract: A method of generating an interactive graphical user interface (GUI), comprising: receiving one or more images captured by an image sensor of a mobile device in a construction site, each image is associated with one or more positioning parameter indicative of the mobile device’s position when the respective image is captured, rendering the image(s) on a display, receiving user input indicating selection of an area in the image(s) depicting a corresponding area in the construction site, accessing a 3D model documenting construction task status relating to each of a plurality of elements in the construction site, registering the image(s) to the 3D model according to the positioning parameter(s) to identify, in the selected area, elements documented in the 3D model, retrieving a respective construction task status relating to the identified elements; and adapting a GUI presented in association with the selected area according to the respective construction task status.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 15, 2023
    Applicant: Buildots Ltd.
    Inventors: Roy DANON, Yakir SUDRY
  • Patent number: 11677041
    Abstract: Radiation detecting-structures and fabrications methods thereof are presented. The methods include, for instance: providing a substrate, the substrate including at least one trench extending into the substrate from an upper surface thereof; and epitaxially forming a radiation-responsive semiconductor material layer from one or more sidewalls of the at least one trench of the substrate, the radiation-responsive semiconductor material layer responding to incident radiation by generating charge carriers therein. In one embodiment, the sidewalls of the at least one trench of the substrate include a (111) surface of the substrate, which facilitates epitaxially forming the radiation-responsive semiconductor material layer. In another embodiment, the radiation-responsive semiconductor material layer includes hexagonal boron nitride, and the epitaxially forming includes providing the hexagonal boron nitride with an a-axis aligned parallel to the sidewalls of the trench.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: June 13, 2023
    Assignee: Rensselaer Polytechnic Institute
    Inventors: Rajendra P. Dahal, Ishwara B. Bhat, Yaron Danon, James Jian-Qiang Lu
  • Patent number: 11675693
    Abstract: A novel and useful neural network (NN) processing core incorporating inter-device connectivity and adapted to implement artificial neural networks (ANNs). A chip-to-chip interface spreads a given ANN model across multiple devices in a seamless manner. The NN processor is constructed from self-contained computational units organized in a hierarchical architecture. The homogeneity enables simpler management and control of similar computational units, aggregated in multiple levels of hierarchy. Computational units are designed with minimal overhead as possible, where additional features and capabilities are aggregated at higher levels in the hierarchy. On-chip memory provides storage for content inherently required for basic operation at a particular hierarchy and is coupled with the computational resources in an optimal ratio. Lean control provides just enough signaling to manage only the operations required at a particular hierarchical level.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: June 13, 2023
    Inventors: Avi Baum, Or Danon, Hadar Zeitlin, Daniel Ciubotariu, Rami Feig
  • Patent number: 11676435
    Abstract: The present disclosure relates to systems and methods for communicating between devices using short-range communication links. More specifically, the present disclosure relates to systems and methods for communicating access-right data between devices for verification or transfer.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: June 13, 2023
    Inventors: Benson Truong, Daniel Lewis, Michael Estes, Andrew Pratt, Justin Burleigh, Danon Law
  • Publication number: 20230137469
    Abstract: A non-volatile memory has an array of non-volatile memory cells, first reference word lines and second reference word lines, and sense amplifiers. The sense amplifiers read system data, that has been written to supplemental non-volatile memory cells of the first reference word lines, using comparison of the supplemental non-volatile memory cells of the first reference word lines to supplemental non-volatile memory cells of the second reference word lines. Status of erasure of the non-volatile memory cells of the array is determined based on reading the system data.
    Type: Application
    Filed: January 11, 2022
    Publication date: May 4, 2023
    Applicant: Infineon Technologies LLC
    Inventors: Amichai Givant, Idan Koren, Shivananda Shetty, Pawan Singh, Yoram Betser, Kobi Danon, Amir Rochman