Abstract: A data storage device and method for adaptive host memory buffer allocation based on virtual function prioritization are provided. In one embodiment, a data storage device is provided comprising a memory, an interface, and a controller. The controller is configured to receive priority information of each of a plurality of virtual functions in the host and allocate space in the host memory buffer for each of the plurality of virtual functions based on the priority information. The controller is further configured to dynamically reallocate the space. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A data storage device includes one or more memory device and a controller that is DRAM-less coupled to the one or more memory devices. The controller is configured to receive a command from a host device, begin execution of the command, and receive an abort request command for the command. The command includes pointers that direct the data storage device to various locations on the data storage device where relevant content is located. Once the abort command is received, the content of the host pointers stored in the data storage device RAM are changed to point to the HMB. The data storage device then waits until any already started transactions over the interface bus that are associated with the command have been completed. Thereafter, a failure completion command is posted to the host device.

Abstract: The present application provides a compound comprising at least one isotopically labeled nitrogen atom for use in diagnosing a condition or disease in a subject, compositions and kits comprising the compound and methods of using the same.

Abstract: Example storage systems, data storage devices, and methods provide rate levelling among peer storage devices. A master storage device among peer storage devices receives host commands, determines the workload states of the peer storage devices, divides the data units in the host commands into data blocks for data striping, allocates the data blocks among the peer storage devices, and sends the data blocks to the peer storage devices using a peer communication channel.

Abstract: Example storage systems, data storage devices, and methods provide redundant array of independent disk (RAID) control among peer storage devices. A master storage device among peer storage devices receives host commands and determines, based on a peer RAID configuration, data blocks for redundantly storing the host data unit among the peer storage devices. The master storage device allocates the data blocks among the peer storage devices and sends them to the peer storage devices using a peer communication channel.

Abstract: The present disclosure generally relates to host memory buffer (HMB) cache management. HMB is transient memory and may not always be available. For example, when the link between the data storage device and the host device is not active, the data storage device can't access the HMB. Placing an HMB log in the HMB controller that is disposed in the data storage device provides access to data that would otherwise be inaccessible in the HMB. The HMB log contains any deltas that have occurred since either the last copying to an HMB cache in the memory device or any delta that have occurred since the link became inactive. The HMB cache mirrors the HMB. In so doing, the data of the HMB is available to the data storage device not only when the link is active, but also when the link is not active.

Abstract: A storage system includes two or more data storage devices and a controller coupled to the two or more data storage devices. Each data storage device of the two or more data storage devices includes zoned namespace (ZNS) architecture. The controller is configured to collect thermal statistics for each data storage device of the two or more data storage devices, analyze the collected thermal statistics, and designate a zone by selecting one or more dies within at least one data storage device of the two or more data storage devices based on the analyzed collected thermal statistics. The data storage device includes a memory device having a plurality of dies and a controller coupled to the memory device. The controller is configured to collect thermal statistics for each die of the plurality of dies, analyze the collected statistics, and allocate one or more dies to form a zone.

Abstract: Disclosed are systems and methods providing active time-based prioritization in host-managed stream devices. The method includes receiving a plurality of host commands from a host system. The method also includes computing active times of open memory regions. The method also includes determining one or more regions that have remained open for more than a threshold time period, based on the active times. The method also includes prioritizing one or more host commands from amongst the plurality of host commands for completion, the one or more host commands having corresponding logical addresses belonging to the one or more regions, thereby (i) minimizing risk to data and (ii) releasing resources corresponding to the one or more regions.

Abstract: A data storage device having improved protections for in-flight data during a safety event, such as an autonomous-driving-vehicle collision. In an example embodiment, in response to a distress-mode indication signal, the device controller operates to prioritize more-recent data with respect to older counterparts of the same data stream for flushing from the volatile-memory buffers to the non-volatile memory. In addition, the device controller may operate to positively bias the flushed data towards better survivability and/or more-reliable routing.

Abstract: A data storage device and method for prediction-based improved power-loss handling. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to predict a probability of an ungraceful shutdown of the data storage device; determine whether the probability is greater than a threshold; and in response to determining that the probability is greater than the threshold, reduce a risk of data loss that would occur in response to the ungraceful shutdown of the data storage device. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A data storage device includes a non-volatile memory device including a memory block having a number of memory dies, and a controller coupled to the memory device. A memory access command is received and a memory access operation based on the received command is performed. A number of bytes transferred during the memory access operation is determined, and the determined number of bytes is analyzed to determine whether the number of transferred bytes is equal to a predetermined number. A transfer status fail bit is set if the number of transferred bytes is not equal to the predetermined number.

Abstract: A data storage device and method for device-initiated hibernation are provided. In one embodiment, the data storage device comprises a non-volatile memory and a controller. The controller is configured to: receive, from a host during a set-up phase of a hibernation process, a plurality of write commands with a current state of a volatile memory in the host; store the plurality of write commands in a queue, wherein the plurality of write commands are not executed during the set-up phase of the hibernation process; receive a trigger from the host to perform an execution phase of the hibernation process; and in response to receiving the trigger, execute the plurality of write commands to store the current state of the host's volatile memory in the non-volatile memory of the data storage device. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A data storage device comprises a first memory, a second memory, and a controller. The first memory has a faster access time than the second memory. The controller is configured to store host-initialization code in the first memory, store a copy of the host-initialization code in the second memory, determine that the copy of the host-initialization code should be designated as the main version of the host-initialization code, and relocate the copy of the host-initialization code to the first memory, which makes the copy of the host-initialization code the main version of the host-initialization code that is accessed to boot-up the host. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: Aspects of a storage device are provided which apply advanced thermal throttling in response to temperature changes based on multiple thermal power states for different types of cells, such as SLCs and MLCs. Initially, a controller determines that a temperature of the memory meets a thermal throttling threshold of a plurality of thermal throttling thresholds. Subsequently, the controller transitions into a thermal power state of a plurality of thermal power states when the temperature meets the thermal throttling threshold. The controller applies a thermal mitigation configuration associated with the thermal power state. The controller then determines that the temperature of the memory has reached a thermal equilibrium in the thermal power state based on the thermal mitigation configuration. Storage device performance is thus improved through advanced thermal throttling without compromising data integrity.

Abstract: Aspects of a storage device are provided that apply history-based prediction modeling in advanced thermal throttling. Initially, a controller determines a temperature prediction based one or more thermal mitigation parameters using a history-based prediction model. Subsequently, the controller determines whether the temperature prediction indicates that an actual temperature of the memory is expected to meet a thermal throttling threshold of a plurality of thermal throttling thresholds. The controller then transitions into a thermal power state of a plurality of thermal power states when the temperature prediction indicates that the actual temperature of the memory is expected to meet the thermal throttling threshold. The controller applies a thermal mitigation configuration associated with the thermal power state and determines that the temperature of the memory has reached a thermal equilibrium based on the thermal mitigation configuration.

Abstract: The present disclosure generally relates to detecting command identification (CID) collisions in host commands. Host commands stored in submission queues are supposed to have unique CIDs. The host device selects the CID and attaches the CID to the command. Once the command is executed, the host device may reuse the CID. Sometimes, the host device reuses a CID before a command already using the CID is executed, which is a collision. Rather than search all CIDs to find a collision, redundancy bits can be created for each command, and the redundancy can be the same for multiple pending commands. The redundancy bits can be checked first to see if there is a match, followed by comparing CIDs for only those commands that have matching redundancy bits. In so doing, CID collisions are detected earlier and easier.

Abstract: Aspects of a storage device are provided that apply advanced thermal throttling with multi-tier extreme thermal throttling. Initially, a controller determines whether a first temperature measurement indicates that a temperature of the memory meets a first thermal threshold associated with a first-tier extreme thermal throttling or a second thermal threshold associated with a second-tier extreme thermal throttling. Subsequently, the controller enables the first-tier extreme thermal throttling when the temperature measurement indicates that the temperature of the memory meets the first thermal threshold, or the controller enables the second-tier extreme thermal throttling when the temperature measurement indicates that the temperature of the memory meets the second thermal threshold. The controller then determines whether a second temperature measurement indicates that the temperature of the memory has decreased to avoid thermal shutdown of the storage device.

Abstract: Aspects of a storage device are provided that apply history-based prediction modeling in advanced thermal throttling. Initially, a controller determines a temperature prediction based one or more thermal mitigation parameters using a history-based prediction model. Subsequently, the controller determines whether the temperature prediction indicates that an actual temperature of the memory is expected to meet a thermal throttling threshold of a plurality of thermal throttling thresholds. The controller then transitions into a thermal power state of a plurality of thermal power states when the temperature prediction indicates that the actual temperature of the memory is expected to meet the thermal throttling threshold. The controller applies a thermal mitigation configuration associated with the thermal power state and determines that the temperature of the memory has reached a thermal equilibrium based on the thermal mitigation configuration.

Abstract: Aspects of a storage device are provided which apply advanced thermal throttling in response to temperature changes based on multiple thermal power states for different types of cells, such as SLCs and MLCs. Initially, a controller determines that a temperature of the memory meets a thermal throttling threshold of a plurality of thermal throttling thresholds. Subsequently, the controller transitions into a thermal power state of a plurality of thermal power states when the temperature meets the thermal throttling threshold. The controller applies a thermal mitigation configuration associated with the thermal power state. The controller then determines that the temperature of the memory has reached a thermal equilibrium in the thermal power state based on the thermal mitigation configuration. Storage device performance is thus improved through advanced thermal throttling without compromising data integrity.

Abstract: A storage system includes one or more data storage devices, a PCIe switch coupled to the one or more data storage devices, and a controller unit coupled to the PCIe switch. The controller unit includes a dynamic random access memory (DRAM) host memory buffer (HMB) controller and a DRAM pool or a controller memory buffer (CMB) controller, a root complex/port, and the DRAM pool. The DRAM pool includes one or more DRAM devices. The one or more data storage devices are configured to interact with the controller unit and store data to a DRAM of the DRAM pool of the controller unit.