Patents by Inventor Or Weis

Or Weis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973664
    Abstract: The disclosure reveals a system and approach for remote health monitoring and diagnostics of room controllers, networks and devices. A master room controller may be used to open a system health page or a diagnostic page for other controllers. A system health page may provide an overview of virtually all of the other room controllers. A tool of the present system may be used to trouble shoot issues remotely at another room controller in lieu of doing a visit to the respective room controller. A user may navigate from the system health page to virtually any place on the room controller to diagnose issues. The navigation may be done by hyper linking from the system health page. The healthy controllers may be hidden from the page so that the unhealthy systems can be viewed in one shot.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: April 30, 2024
    Assignee: HONEYWELL INTERNATIONAL INC.
    Inventors: Ajay Nair, Upender Paravastu, Jijji Ramanathan, Mallikarjuna Nonayinakere Sugandharajappa, James Barrette, Liwen Yu, Christopher Martin, Wei Hua, Robert Klamka
  • Patent number: 11973621
    Abstract: A data slicer may include an input transistor configured to generate an internal output voltage based on an input voltage at an input node. An output node may be configured to output an output voltage based on the internal output voltage, and a feedback transistor may be configured to adjust the internal output voltage based on a correction voltage corresponding to output of the output node in a previous cycle.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 30, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventor: Da Wei
  • Patent number: 11972974
    Abstract: An IC structure includes a transistor, a source/drain contact, a metal oxide layer, a non-metal oxide layer, a barrier structure, and a via. The transistor includes a gate structure and source/drain regions on opposite sides of the gate structure. The source/drain contact is over one of the source/drain regions. The metal oxide layer is over the source/drain contact. The non-metal oxide layer is over the metal oxide layer. The barrier structure is over the source/drain contact. The barrier structure forms a first interface with the metal oxide layer and a second interface with the non-metal oxide layer, and the second interface is laterally offset from the first interface. The via extends through the non-metal oxide layer to the barrier structure.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sung-Li Wang, Shuen-Shin Liang, Yu-Yun Peng, Fang-Wei Lee, Chia-Hung Chu, Mrunal Abhijith Khaderbad, Keng-Chu Lin
  • Patent number: 11969448
    Abstract: A probiotic composition for improving an effect of a chemotherapeutic drug of Gemcitabine on inhibiting pancreatic cancer is disclosed in the present disclosure. The probiotic composition comprises an effective amount of Lactobacillus paracasei GMNL-133, an effective amount of Lactobacillus reuteri GMNL-89, and a pharmaceutically acceptable carrier, wherein the Lactobacillus paracasei GMNL-133 was deposited in the China Center for Type Culture Collection on Sep. 26, 2011 under an accession number CCTCC NO. M 2011331, and the Lactobacillus reuteri GMNL-89 was deposited in the China Center for Type Culture Collection on Nov. 19, 2007 under an accession number CCTCC NO. M 207154. A method for improving the effect of the chemotherapeutic drug of Gemcitabine on inhibiting pancreatic cancer is further disclosed in the present disclosure.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: April 30, 2024
    Assignee: GENMONT BIOTECH INC.
    Inventors: Wan-Hua Tsai, I-ling Hsu, Shan-ju Hsu, Wen-ling Yeh, Ming-shiou Jan, Wee-wei Chieng, Li-jin Hsu, Ying-chun Lai
  • Patent number: 11973129
    Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device includes forming nanowire structures stacked over a substrate and spaced apart from one another, and forming a dielectric material surrounding the nanowire structures. The dielectric material has a first nitrogen concentration. The method also includes treating the dielectric material to form a treated portion. The treated portion of the dielectric material has a second nitrogen concentration that is greater than the first nitrogen concentration. The method also includes removing the treating portion of the dielectric material, thereby remaining an untreated portion of the dielectric material as inner spacer layers; and forming the gate stack surrounding nanowire structures and between the inner spacer layers.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Han-Yu Lin, Chansyun David Yang, Fang-Wei Lee, Tze-Chung Lin, Li-Te Lin, Pinyen Lin
  • Patent number: 11973095
    Abstract: A chip package including a substrate, a first conductive structure, and an electrical isolation structure is provided. The substrate has a first surface and a second surface opposite the first surface), and includes a first opening and a second opening surrounding the first opening. The substrate includes a sensor device adjacent to the first surface. A first conductive structure includes a first conductive portion in the first opening of the substrate, and a second conductive portion over the second surface of the substrate. An electrical isolation structure includes a first isolation portion in the second opening of the substrate, and a second isolation portion extending from the first isolation portion and between the second surface of the substrate and the second conductive portion. The first isolation portion surrounds the first conductive portion.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: April 30, 2024
    Assignee: XINTEC INC.
    Inventors: Kuei-Wei Chen, Chia-Ming Cheng, Chia-Sheng Lin
  • Patent number: 11971031
    Abstract: The present disclosure provides a pump body assembly, a heat exchange apparatus, a fluid machine and an operating method thereof. The pump body assembly includes a piston, a shaft, a piston sheath, and a cylinder. The shaft drives the piston to rotate and reciprocate within the piston sheath while rotating. The piston sheath is located in the cylinder, and a compression chamber is defined between an outer circumferential wall of the piston and an inner wall of the cylinder. A pressure relief recess is defined in the outer circumferential wall of the piston or the inner wall of the cylinder at a position corresponding to the compression chamber.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: April 30, 2024
    Assignee: GREE ELECTRIC APPLIANCES, INC. OF ZHUHAI
    Inventors: Mingzhu Dong, Yusheng Hu, Huijun Wei, Jia Xu, Zhongcheng Du, Liping Ren, Sen Yang, Zhi Li, Peilin Zhang, Shebing Liang, Zhengliang Shi, Rongting Zhang, Ning Ding
  • Patent number: 11970945
    Abstract: A hole protection system and a method for coal seam slotting and fracturing combined drainage. The system includes a hydraulic slotting subsystem, a hydraulic fracturing subsystem and a flexible hole protection system. The hydraulic slotting subsystem includes an ultra-high pressure water jet generating module, a drill pipe drilling tool module, an orifice sealer, a gas slag separator and a drilling rig. The hydraulic fracturing system includes an emulsion pump station, a water tank, a hole sealing device, a fracturing string and a casing. The flexible hole protection system includes a front end fixing device, a water injection support pipe, a first flexible support and a water injection connecting section.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: April 30, 2024
    Assignees: Hancheng Zaozhuang Industrial Co., Ltd., Chongqing University
    Inventors: Xiaoyan Sun, Quanle Zou, Qican Ran, Peimiao Sang, Jinyan Liang, Ning Li, Wei Pi
  • Patent number: 11974479
    Abstract: An electrical connection structure is provided. The electrical connection structure includes a through hole, a first pad, a second pad and a conductive bridge. The through hole has a first end and a second end. The first pad at least partially surrounds the first end of the through hole and is electrically connected to a first circuit. The second pad is located at the second end of the through hole and is electrically connected to a second circuit. The conductive bridge is connected to the first pad and second pad through the through hole, thereby making the first and second circuits electrically connected to each other.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: April 30, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Shun-Yuan Hu, Chin-Lung Ting, Li-Wei Mao, Ming-Chun Tseng, Kung-Chen Kuo, Yi-Hua Hsu, Ker-Yih Kao
  • Patent number: 11968933
    Abstract: One embodiment provides a modular green roof tray, house plant growth media and horticulture growth media, and a tree protection mat for weed and moisture control made from recycled disposable diapers. The growth medium and tree protection mat contain superabsorbent materials from diaper that can absorb waters and greatly reduce irrigation so to provide a drought resistant feature. One embodiment also provides a manufacturing process to perform 100% recycling of disposed diapers.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: April 30, 2024
    Assignee: ZYNNOVATION LLC
    Inventors: Wei Zhang, Hailing Yang
  • Patent number: 11973107
    Abstract: A manufacturing method of a semiconductor super-junction device includes the following steps: An n-type substrate is etched in a self-aligning manner using a first insulating layer and a second insulating layer as a mask to form a second groove in the n-type substrate. A gate structure is formed in the second groove.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: April 30, 2024
    Assignee: SUZHOU ORIENTAL SEMICONDUCTOR CO., LTD.
    Inventors: Wei Liu, Yuanlin Yuan, Rui Wang, Lei Liu
  • Patent number: 11972810
    Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected word lines. The memory cells are disposed in strings and configured to retain a threshold voltage. A control means is configured to apply a program voltage to selected ones of the word lines while applying pass voltages to unselected ones of the word lines and ramp down both the selected ones of the plurality of word lines and the unselected ones of the word lines to a recovery voltage at a start of a verify phase of each of a plurality of program loops and apply a targeted word line bias to each of the word lines during the verify phase. The control means is also configured to adjust the recovery voltage based on the targeted word line bias applied to each of the plurality of word lines during the verify phase.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: April 30, 2024
    Assignee: SanDisk Technologies, LLC
    Inventors: Han-Ping Chen, Wei Zhao, Henry Chin
  • Patent number: 11969059
    Abstract: An electrically releasable buckle assembly (12) for a motor vehicle restraint (10) may include latch components (18) configured to releasably engage a tongue member (14B) of the motor vehicle restraint (10), a release button (16) operatively coupled to the latch components (18), the release button (16) having a latched position in which the latching components engage the tongue member (14B) and a release position in which the latch components (18) release the tongue member (14B), an electrical energy source (32), at least one shape memory alloy component (26) operatively coupled to the release button (16), the at least one shape memory alloy component (26) responsive to heating thereof by electrical energy supplied by the source (32) to a temperature at or above a transition temperature thereof to move the release button (16) from the latched position to the release position, and means (34) for selectively supplying electrical energy from the electrical energy source (32) to the at least one shape memory allo
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: April 30, 2024
    Assignee: INDIANA MILLS & MANUFACTURING, INC.
    Inventors: Chris P. Jessup, Nathan Beadle, Brian N. Coffman, Wei X. Zhang
  • Patent number: 11971280
    Abstract: The present disclosure provides a metering and correcting method and system for an ultrasonic gas meter based on smart gas Internet of Things (IoT). The metering and correcting method is implemented on a smart gas device management platform of the metering and correcting system and includes: in response to receiving a co-correction request from the ultrasonic gas meter, obtaining ultrasonic data and gas medium data; determining a target signal stability value of the ultrasonic gas meter based on the ultrasonic data and the gas medium data; in response to the target signal stability value not meeting a second preset condition, determining a co-correction strategy and sending the co-correction strategy to the ultrasonic gas meter; and evaluating a correction accuracy of the ultrasonic gas meter for performing a correction process based on the co-correction strategy.
    Type: Grant
    Filed: September 11, 2023
    Date of Patent: April 30, 2024
    Assignee: CHENGDU QINCHUAN IOT TECHNOLOGY CO., LTD.
    Inventors: Zehua Shao, Yaqiang Quan, Xiaojun Wei, Feng Wang
  • Patent number: 11973192
    Abstract: The invention provides an electrode body for a cylindrical lithium battery, which is formed by winding a laminated body including a negative electrode sheet, a first separator, a positive electrode sheet, a plurality of cathode tabs and a plurality of anode tabs, wherein the negative sheet and the positive sheet have a negative electrode coating and a positive electrode coating, respectively. In the present invention, the positive electrode coating is provided on the positive electrode sheet in a specific configuration to increase the coating area of the positive electrode coating, thereby increasing the capacitance of the electrode body.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: April 30, 2024
    Assignee: E-ONE MOLI ENERGY CORP.
    Inventors: Jui-Min Tsai, Tsung-Yi Tsai, Kun-Miao Tsai, Wei-Dung Chang
  • Patent number: 11969447
    Abstract: A composition for promoting defecation includes a cell culture of at least one lactic acid bacterial strain which is substantially free of cells. The least one lactic acid bacterial strain is selected from the group consisting of Lactobacillus salivarius subsp. salicinius AP-32, Bifidobacterium animalis subsp. lactis CP-9, and Lactobacillus acidophilus TYCA06, which are respectively deposited at the Bioresource Collection and Research Center (BCRC) under accession numbers BCRC 910437, BCRC 910645 and BCRC 910813. Also disclosed is a method for promoting defecation, including administering to a subject in need thereof an effective amount of the composition.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 30, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yi-Wei Kuo, Yu-Fen Huang, Cheng-Chi Lin
  • Patent number: 11970508
    Abstract: Provided are transition metal compounds having 1,2,3-triazine. Also provided are formulations comprising these transition metal compounds having 1,2,3-triazine. Further provided are OLEDs and related consumer products that utilize these transition metal compounds having 1,2,3-triazine.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: April 30, 2024
    Assignee: UNIVERSAL DISPLAY CORPORATION
    Inventors: Zhiqiang Ji, Pierre-Luc T. Boudreault, Wei-Chun Shih, Alexey Borisovich Dyatkin, Jui-Yi Tsai
  • Patent number: 11971992
    Abstract: Systems and methods for failure characterization of secure programmable logic devices (PLDs) are disclosed. An example system includes a secure PLD including programmable logic blocks (PLBs) arranged in PLD fabric of the secure PLD, and a configuration engine configured to program the PLD fabric according to a configuration image stored in non-volatile memory (NVM) of the secure PLD and/or coupled through a configuration input/output (I/O) of the secure PLD. The secure PLD is configured to receive a failure characterization (FC) command from the PLD fabric or an external system coupled to the secure PLD through the configuration I/O, and to execute the FC command to, at least in part, erase and/or nullify portions of the NVM. The secure PLD may also be configured to boot a debug configuration for the PLD fabric that identifies and/or characterizes operational failures of the secure PLD.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: April 30, 2024
    Assignee: Lattice Semiconductor Corporation
    Inventors: Fulong Zhang, Srirama Chandra, Sreepada Hegade, Joel Coplen, Wei Han, Yu Sun
  • Patent number: D1024931
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: April 30, 2024
    Assignee: Shenzhen Fanttik Technology Innovation Co., Ltd.
    Inventors: Peng Qin, Wei Peng
  • Patent number: D1024995
    Type: Grant
    Filed: May 31, 2021
    Date of Patent: April 30, 2024
    Assignee: Acer Incorporated
    Inventors: I-Lun Li, Szu-Wei Yang, Fang-Ying Huang