Patents by Inventor Orang Azgomi

Orang Azgomi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8266199
    Abstract: A specialized processing block for a programmable logic device incorporates a fundamental processing unit that performs a sum of two multiplications, adding the partial products of both multiplications without computing the individual multiplications. Such fundamental processing units consume less area than conventional separate multipliers and adders. The specialized processing block further has input and output stages, as well as a loopback function, to allow the block to be configured for various digital signal processing operations.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: September 11, 2012
    Assignee: Altera Corporation
    Inventors: Martin Langhammer, Kwan Yee Martin Lee, Orang Azgomi, Keone Streicher, Yi-Wen Lin
  • Patent number: 8041759
    Abstract: A specialized processing block for a programmable logic device incorporates a fundamental processing unit that performs a sum of two multiplications, adding the partial products of both multiplications without computing the individual multiplications. Such fundamental processing units consume less area than conventional separate multipliers and adders. The specialized processing block further has input and output stages, as well as a loopback function, to allow the block to be configured for various digital signal processing operations, including finite impulse response (FIR) filters and infinite impulse response (IIR) filters. By using the programmable connections, and in some cases the programmable resources of the programmable logic device, and by running portions of the specialized processing block at higher clock speeds than the remainder of the programmable logic device, more complex FIR and IIR filters can be implemented.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: October 18, 2011
    Assignee: Altera Corporation
    Inventors: Martin Langhammer, Kwan Yee Martin Lee, Orang Azgomi, Keone Streicher, Robert L. Pelt
  • Patent number: 7836117
    Abstract: A specialized processing block for a programmable logic device incorporates a fundamental processing unit that performs a sum of two multiplications, adding the partial products of both multiplications without computing the individual multiplications. Such fundamental processing units consume less area than conventional separate multipliers and adders. The specialized processing block further has input and output stages, as well as a loopback function, to allow the block to be configured for various digital signal processing operations.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: November 16, 2010
    Assignee: Altera Corporation
    Inventors: Martin Langhammer, Kwan Yee Martin Lee, Triet M. Nguyen, Keone Streicher, Orang Azgomi
  • Publication number: 20070185952
    Abstract: A specialized processing block for a programmable logic device incorporates a fundamental processing unit that performs a sum of two multiplications, adding the partial products of both multiplications without computing the individual multiplications. Such fundamental processing units consume less area than conventional separate multipliers and adders. The specialized processing block further has input and output stages, as well as a loopback function, to allow the block to be configured for various digital signal processing operations.
    Type: Application
    Filed: June 5, 2006
    Publication date: August 9, 2007
    Applicant: Altera Corporation
    Inventors: Martin Langhammer, Kwan Yee Martin Lee, Orang Azgomi, Keone Streicher, Yi-Wen Lin