Patents by Inventor Oren David

Oren David has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10642791
    Abstract: A computerized method and apparatus for distinguishing between false positive read events and true positive events of reading a file, comprising determining an amount of date read from the file, in case the amount of data exceeds a threshold generating a true positive read event, otherwise generating a false positive read event in case a decision condition is met, and an apparatus to carry out the same.
    Type: Grant
    Filed: March 26, 2017
    Date of Patent: May 5, 2020
    Assignee: VARONIS SYSTEMS, INC.
    Inventors: Yakov Faitelson, Ohad Korkus, David Bass, Yzhar Kaysar, Doron Goldstein, Oren David
  • Publication number: 20170199890
    Abstract: A computerized method and apparatus for distinguishing between false positive read events and true positive events of reading a file, comprising determining an amount of date read from the file, in case the amount of data exceeds a threshold generating a true positive read event, otherwise generating a false positive read event in case a decision condition is met, and an apparatus to carry out the same.
    Type: Application
    Filed: March 26, 2017
    Publication date: July 13, 2017
    Inventors: Yakov FAITELSON, Ohad Korkus, David Bass, Yzhar Kaysar, Doron Goldestein, Oren David
  • Patent number: 9639541
    Abstract: A computerized method and apparatus for distinguishing between false positive read events and true positive events of reading a file, comprising determining an amount of date read from the file, in case the amount of data exceeds a threshold generating a true positive read event, otherwise generating a false positive read event in case a decision condition is met, and an apparatus to carry out the same.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: May 2, 2017
    Assignee: VARONIS SYSTEMS, INC
    Inventors: Yakov Faitelson, Ohad Korkus, David Bass, Yzhar Kaysar, Doron Goldstein, Oren David
  • Publication number: 20140297612
    Abstract: A computerized method and apparatus for distinguishing between false positive read events and true positive events of reading a file, comprising determining an amount of date read from the file, in case the amount of data exceeds a threshold generating a true positive read event, otherwise generating a false positive read event in case a decision condition is met, and an apparatus to carry out the same.
    Type: Application
    Filed: June 11, 2014
    Publication date: October 2, 2014
    Inventors: Yakov FAITELSON, Ohad KORKUS, David BASS, Yzhar KAYSAR, Doron GOLDSTEIN, Oren DAVID
  • Patent number: 8782027
    Abstract: A computerized method and apparatus for distinguishing between false positive read events and true positive events of reading a file, comprising determining an amount of date read from the file, in case the amount of data exceeds a threshold generating a true positive read event, otherwise generating a false positive read event in case a decision condition is met, and an apparatus to carry out the same.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: July 15, 2014
    Assignee: Varonis Systems, Inc.
    Inventors: Yakov Faitelson, Ohad Korkus, David Bass, Yzhar Kaysar, Doron Goldstein, Oren David
  • Publication number: 20130191358
    Abstract: A computerized method and apparatus for distinguishing between false positive read events and true positive events of reading a file, comprising determining an amount of date read from the file, in case the amount of data exceeds a threshold generating a true positive read event, otherwise generating a false positive read event in case a decision condition is met, and an apparatus to carry out the same.
    Type: Application
    Filed: January 24, 2012
    Publication date: July 25, 2013
    Applicant: VARONIS SYSTEMS, INC.
    Inventors: Yakov FAITELSON, Ohad Korkus, David Bass, Yzhar Kaysar, Doron Goldstein, Oren David
  • Patent number: 8230144
    Abstract: A reduced instruction set computer (RISC) includes at least one arithmetic logic units (ALUs), which are arranged to evaluate logical conditions. A processing pipeline is arranged to solve a decision problem that is representable as a decision tree including at least three nodes by processing a sequence of pipelined instructions that traverse the decision tree. At least some of the pipelined instructions instruct the one or more ALUs to evaluate respective logical conditions, such that the pipeline flushes the instructions from the pipeline no more than once in the course of processing the sequence regardless of whether the logical conditions evaluate to true or false.
    Type: Grant
    Filed: October 18, 2005
    Date of Patent: July 24, 2012
    Assignee: Broadcom Corporation
    Inventors: Eli Aloni, Gilad Ayalon, Oren David
  • Patent number: 7873817
    Abstract: A reduced instruction set computer (RISC) processor includes a processing core, which is arranged to process a software thread. A hardware-implemented scheduler is arranged to receive respective contexts of a plurality of software threads, to determine a schedule for processing of the software threads by the processing core, and to serve the contexts to the processing core in accordance with the schedule.
    Type: Grant
    Filed: October 18, 2005
    Date of Patent: January 18, 2011
    Inventors: Eli Aloni, Gilad Ayalon, Oren David