Patents by Inventor Oren Gelberg

Oren Gelberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8306011
    Abstract: A device includes a processor and a time slot assigner, connected to a communication line via a physical layer unit. The physical layer unit is adapted to generate a communication line clock signal and a multi-frame synchronization signal. The device also includes a transmit media access controller (MAC) adapted to receive the multi-frame synchronization signal and the communication line clock signal and in response to scan, during a single multi-frame transmission period, multiple transmit MAC memory entry groups such as to retrieve transmission instructions and in response to enable access to the communication line. During a single multi-frame transmission period the transmit MAC accesses at least twice at least one transmit MAC memory entry group. The processor receives a processor clock signal that differs from the communication line clock signal. The MAC also performs reception operations using receive clock and sync signals.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: November 6, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Eran Glickman, Oren Gelberg, Dan Ilan
  • Patent number: 7949800
    Abstract: A device and a method for exchanging information with registers of a physical layer component. The method includes allocating at least one receive buffer for receiving the status information; associating at least one receive buffer descriptor with the at least one receive buffer; sending to a physical layer component a request to read status information stored in a selected status register of the physical layer component; and writing the status information to the at least one receive buffer descriptor.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: May 24, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Oren Gelberg, Motti Dvir, Yehuda Rudin
  • Publication number: 20090132735
    Abstract: A device and a method for exchanging information with registers of a physical layer component. The method includes allocating at least one receive buffer for receiving the status information; associating at least one receive buffer descriptor with the at least one receive buffer; sending to a physical layer component a request to read status information stored in a selected status register of the physical layer component; and writing the status information to the at least one receive buffer descriptor.
    Type: Application
    Filed: February 9, 2006
    Publication date: May 21, 2009
    Applicant: FREESCALE SSEMICONDUCTOR, INC.,
    Inventors: Oren Gelberg, Motti Dvir, Yehuda Rudin
  • Publication number: 20090046700
    Abstract: A device having multi-frame transmission and reception capabilities and a method for transmitting and receiving multi-frames. The device includes a processor, a time slot assigner, connected to a communication line via a physical layer unit. The physical layer unit is adapted to generate a communication line clock signal (LINE_TX_CLK1) and a multi-frame synchronization signal (MFRAME_TX_SYNC1). The device is characterized by including a transmit media access controller (MAC) connected to the physical layer unit whereas the MAC is adapted to receive the MFRAME_TX_SYNC1 and LINE_TX_CLK1 signals and in response to scan, during a single multi-frame transmission period, multiple transmit MAC memory entry groups such as to retrieve transmission instructions and in response to enable access to the communication line. Each transmit MAC memory entry group stores transmission instructions that control a transmission of a frame.
    Type: Application
    Filed: November 17, 2005
    Publication date: February 19, 2009
    Inventors: Eran Glickman, Oren Gelberg, Dan Ilan