Patents by Inventor Oren Kerem
Oren Kerem has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11842700Abstract: Throttling circuitry may throttle the backlight reconstruction via backlight reconstruction and compensation circuitry in a display pipeline when power may be limited. This throttling of the display pipeline may limit a number of cycles that may be used for performing backlight reconstruction and compensation.Type: GrantFiled: February 14, 2023Date of Patent: December 12, 2023Assignee: Apple Inc.Inventors: Prabhu Rajamani, Liang Deng, Oren Kerem, Meir Harar, Ido Yaacov Soffair, Assaf Menachem, John H. Kelm, Rohit K. Gupta
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Publication number: 20230197022Abstract: Throttling circuitry may throttle the backlight reconstruction via backlight reconstruction and compensation circuitry in a display pipeline when power may be limited. This throttling of the display pipeline may limit a number of cycles that may be used for performing backlight reconstruction and compensation.Type: ApplicationFiled: February 14, 2023Publication date: June 22, 2023Inventors: Prabhu Rajamani, Liang Deng, Oren Kerem, Meir Harar, Ido Yaacov Soffair, Assaf Menachem, John H. Kelm, Rohit K. Gupta
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Patent number: 11594189Abstract: Throttling circuitry may throttle the backlight reconstruction via backlight reconstruction and compensation circuitry in a display pipeline when power may be limited. This throttling of the display pipeline may limit a number of cycles that may be used for performing backlight reconstruction and compensation.Type: GrantFiled: July 6, 2021Date of Patent: February 28, 2023Assignee: Apple Inc.Inventors: Prabhu Rajamani, Liang Deng, Oren Kerem, Meir Harar, Ido Yaacov Soffair, Assaf Menachem, John H. Kelm, Rohit K. Gupta
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Publication number: 20220084474Abstract: Throttling circuitry may throttle the backlight reconstruction via backlight reconstruction and compensation circuitry in a display pipeline when power may be limited. This throttling of the display pipeline may limit a number of cycles that may be used for performing backlight reconstruction and compensation.Type: ApplicationFiled: July 6, 2021Publication date: March 17, 2022Inventors: Prabhu Rajamani, Liang Deng, Oren Kerem, Meir Harar, Ido Yaacov Soffair, Assaf Menachem, John H. Kelm, Rohit K. Gupta
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Patent number: 11024006Abstract: A portable electronic device may include an image signal processor that includes a clipping circuit, a pyramid generator circuit, and an image fusion processor. The clipping circuit clips pixel values that are under-exposed or over-exposed. The pyramid generator circuit applies a filter to the pixels of the image to generate a filtered image. Some of the filtered pixels may be generated from one or more clipped pixel values. The pyramid generator circuit identifies those filtered pixels that are generated from one or more clipped pixel values and marks the identified filtered pixels with a tag. The pyramid generator circuit decimates the filtered image to generate a downscaled image, which may include one or more filtered pixels that are marked with the tags. The image fusion processor fuses the downscaled image with another image. The pixels that are marked with the tags may be disregarded in the fusion process.Type: GrantFiled: April 22, 2019Date of Patent: June 1, 2021Assignee: Apple Inc.Inventors: Maxim Smirnov, Elena Lamburn, Oren Kerem, Chihsin Wu
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Patent number: 11010870Abstract: Embodiments relate to two stage multi-scale processing of an image. A first stage processing circuitry generates an unscaled single color version of the image that undergoes noise reduction before generating a high frequency component of the unscaled single color version. A scaler generates a first downscaled version of the image comprising a plurality of color components. A second stage processing circuitry generates a plurality of sequentially downscaled images based on the first downscaled version. The second stage processing circuitry processes the first downscaled version and the downscaled images to generate a processed version of the first downscaled version. The unscaled single color high frequency component and the processed version of the first downscaled version of the image are merged to generate a processed version of the image.Type: GrantFiled: April 14, 2020Date of Patent: May 18, 2021Assignee: Apple Inc.Inventors: Maxim W. Smirnov, David R. Pope, Oren Kerem, Elena Lamburn
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Publication number: 20200334787Abstract: A portable electronic device may include an image signal processor that includes a clipping circuit, a pyramid generator circuit, and an image fusion processor. The clipping circuit clips pixel values that are under-exposed or over-exposed. The pyramid generator circuit applies a filter to the pixels of the image to generate a filtered image. Some of the filtered pixels may be generated from one or more clipped pixel values. The pyramid generator circuit identifies those filtered pixels that are generated from one or more clipped pixel values and marks the identified filtered pixels with a tag. The pyramid generator circuit decimates the filtered image to generate a downscaled image, which may include one or more filtered pixels that are marked with the tags. The image fusion processor fuses the downscaled image with another image. The pixels that are marked with the tags may be disregarded in the fusion process.Type: ApplicationFiled: April 22, 2019Publication date: October 22, 2020Inventors: Maxim Smirnov, Elena Lamburn, Oren Kerem, Chihsin Wu
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Publication number: 20200242731Abstract: Embodiments relate to two stage multi-scale processing of an image. A first stage processing circuitry generates an unscaled single color version of the image that undergoes noise reduction before generating a high frequency component of the unscaled single color version. A scaler generates a first downscaled version of the image comprising a plurality of color components. A second stage processing circuitry generates a plurality of sequentially downscaled images based on the first downscaled version. The second stage processing circuitry processes the first downscaled version and the downscaled images to generate a processed version of the first downscaled version. The unscaled single color high frequency component and the processed version of the first downscaled version of the image are merged to generate a processed version of the image.Type: ApplicationFiled: April 14, 2020Publication date: July 30, 2020Inventors: Maxim W. Smirnov, David R. Pope, Oren Kerem, Elena Lamburn
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Patent number: 10657623Abstract: Embodiments relate to two stage multi-scale processing of an image. A first stage processing circuitry generates an unscaled single color version of the image that undergoes noise reduction before generating a high frequency component of the unscaled single color version. A scaler generates a first downscaled version of the image comprising a plurality of color components. A second stage processing circuitry generates a plurality of sequentially downscaled images based on the first downscaled version. The second stage processing circuitry processes the first downscaled version and the downscaled images to generate a processed version of the first downscaled version. The unscaled single color high frequency component and the processed version of the first downscaled version of the image are merged to generate a processed version of the image.Type: GrantFiled: August 10, 2018Date of Patent: May 19, 2020Assignee: Apple Inc.Inventors: Maxim Smirnov, David R. Pope, Oren Kerem, Elena Lamburn
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Publication number: 20200051209Abstract: Embodiments relate to two stage multi-scale processing of an image. A first stage processing circuitry generates an unscaled single color version of the image that undergoes noise reduction before generating a high frequency component of the unscaled single color version. A scaler generates a first downscaled version of the image comprising a plurality of color components. A second stage processing circuitry generates a plurality of sequentially downscaled images based on the first downscaled version. The second stage processing circuitry processes the first downscaled version and the downscaled images to generate a processed version of the first downscaled version. The unscaled single color high frequency component and the processed version of the first downscaled version of the image are merged to generate a processed version of the image.Type: ApplicationFiled: August 10, 2018Publication date: February 13, 2020Inventors: Maxim Smirnov, David R. Pope, Oren Kerem, Elena Lamburn
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Patent number: 8954409Abstract: In general, techniques of the present disclosure relate to synchronizing concurrent access to multiple portions of a data structure. In one example, a method includes, sequentially selecting a plurality of requests from a request queue, wherein at least one of the requests specifies a plurality of requested synchronization objects for corresponding candidate portions of a data structure to which to apply an operation associated with a data element. The method also includes querying one or more sets of identifiers to determine whether one or more of the requested synchronizations objects specified by the selected request are acquirable. The method also includes acquiring each of the requested synchronization objects that are acquirable. The method includes, responsive to acquiring all of the one or more requested synchronization objects, selecting a subset of the candidate portions of the data structure and applying the operation only to the selected subset of the candidate portions.Type: GrantFiled: September 22, 2011Date of Patent: February 10, 2015Assignee: Juniper Networks, Inc.Inventors: Oren Kerem, Jeffrey G. Libby, Deepak Goel, David J. Ofelt, Anurag P. Gupta
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Publication number: 20060229923Abstract: A method for workflow management includes modeling a workflow as a set of nodes linked by transitions. At least one of the nodes is defined as an action triggered by a situation using a complex event processing (CEP) engine. During execution of the workflow, the CEP engine is invoked in order to detect the situation, and the action is performed responsively to detection of the situation by the CEP engine.Type: ApplicationFiled: March 30, 2005Publication date: October 12, 2006Applicant: International Business Machines CorporationInventors: Asaf Adi, Koby Hadash, Oren Kerem, Gil Nechushtai, David Oren, Boris Shulman