Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.

Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.

Abstract: For one disclosed embodiment, a processor comprises a plurality of processor cores to operate at variable performance levels. One of the plurality of processor cores may operate at a performance level different than a performance level at which another one of the plurality of processor cores may operate. Logic of the processor is to monitor activity of one or more of the plurality of processor cores. Logic of the processor is to constrain power of one or more of the plurality of processor cores based at least in part on the monitored activity. Other embodiments are also disclosed.

Abstract: Briefly, a processor and a method of estimating an active energy consumption of two or more cores of a processor based on dispatching micro operations to one or more execution units of the processor.

Abstract: A method, system, and apparatus to enable at least one active core in a multi-core processor to operate at a higher operating point while at least one other core in the multi-core processor is in an idle state. When the idle core exits the idle state, the operating point may be reduced after a hysteresis timer has expired.

Abstract: Systems and methods of managing operating points provide for determining the number of active cores in a plurality of processor cores. A maximum operating point is selected for at least one of the active cores based on the number of active cores. In one embodiment, the number of active cores is determined by monitoring an ACPI processor power state signal of each of the plurality of cores.

Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.

Abstract: Systems and methods of managing operating points provide for determining the number of active cores in a plurality of processor cores. A maximum operating point is selected for at least one of the active cores based on the number of active cores. In one embodiment, the number of active cores is determined by monitoring an ACPI processor power state signal of each of the plurality of cores.

Abstract: Systems and methods of thermal management provide for dynamically the upper and lower operating points of a throttled device such as a processor. In one embodiment, it is determined that the temperature of the processor is below a threshold and moving the upper operating point and the lower operating point toward one another.

Abstract: Briefly, a processor and a method to control a power consumption of the processor are presented. The method may include: counting a micro-architecture event of a component of the processor, estimating the power consumption value of the processor based on a weighted value of the counted micro-architecture event and filtering the weighted value of the counted micro-architecture event.

Abstract: Briefly, a processor and a method of estimating an active energy consumption of two or more cores of a processor based on dispatching micro operations to one or more execution units of the processor.

Abstract: A method, system, and apparatus to enable at least one active core in a multi-core processor to operate at a higher operating point while at least one other core in the multi-core processor is in an idle state. When the idle core exits the idle state, the operating point may be reduced after a hysteresis timer has expired.

Abstract: A method includes measuring a temperature of a device, determining a voltage applied to the device, determining a leakage power for the device in real time based on the measured temperature and determined voltage and estimating an active power for the device. The method also includes adding the determined leakage power and the estimated active power to estimate a total power value associated with the device, and controlling the device based on the total power value.

Abstract: Systems and methods of thermal management provide for dynamically the upper and lower operating points of a throttled device such as a processor. In one embodiment, it is determined that the temperature of the processor is below a threshold and moving the upper operating point and the lower operating point toward one another.

Abstract: Systems and methods of managing operating points provide for determining the number of active cores in a plurality of processor cores. A maximum operating point is selected for at least one of the active cores based on the number of active cores. In one embodiment, the number of active cores is determined by monitoring an ACPI processor power state signal of each of the plurality of cores.

Abstract: A method and system to profile unconstrained power of a CPU are provided. The method includes identifying a rate of power constraining in the CPU, identifying a threshold to activate power constraining, and determining unconstrained power of the CPU based on the rate of power constraining and the threshold.

Abstract: Briefly, a processor and a method to control a power consumption of the processor are presented. The method may include: counting a micro-architecture event of a component of the processor, estimating the power consumption value of the processor based on a weighted value of the counted micro-architecture event and filtering the weighted value of the counted micro-architecture event.