Patents by Inventor Oreste Bernardi
Oreste Bernardi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8799703Abstract: Some embodiments of the invention relate to an embedded processing system. The system includes a memory unit to store a plurality of operating instructions and a processing unit coupled to the memory unit. The processing unit can execute logical operations corresponding to respective operating instructions. An input/output (I/O) interface receives a first time-varying waveform and provides an I/O signal that is based on the first time-varying waveform. A comparison unit coupled to the processing unit and adapted to selectively assert an error signal based on whether the I/O signal has a predetermined relationship with a reference signal, wherein the predetermined relationship holds true during normal operation but fails to hold true when an unexpected event occurs and causes an unexpected change at least one of the I/O signal and reference signal.Type: GrantFiled: September 16, 2013Date of Patent: August 5, 2014Assignee: Infineon Technologies AGInventors: Simon Brewerton, Patrick Leteinturier, Oreste Bernardi, Antonio Vilela, Klaus Scheibert, Jens Barrenscheen
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Patent number: 8539278Abstract: Some embodiments of the invention relate to an embedded processing system. The system includes a memory unit to store a plurality of operating instructions and a processing unit coupled to the memory unit. The processing unit can execute logical operations corresponding to respective operating instructions. An input/output (I/O) interface receives a first time-varying waveform and provides an I/O signal that is based on the first time-varying waveform. A comparison unit coupled to the processing unit and adapted to selectively assert an error signal based on whether the I/O signal has a predetermined relationship with a reference signal, wherein the predetermined relationship holds true during normal operation but fails to hold true when an unexpected event occurs and causes an unexpected change at least one of the I/O signal and reference signal.Type: GrantFiled: October 29, 2010Date of Patent: September 17, 2013Assignee: Infineon Technologies AGInventors: Simon Brewerton, Patrick Leteinturier, Oreste Bernardi, Antonio Vilela, Klaus Scheibert, Jens Barrenscheen
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Patent number: 8243516Abstract: A NAND-type flash memory device is described. In some embodiments, the memory device includes NAND-type flash memory cells, and a synchronous NAND interface. The synchronous NAND interface includes a standard NAND flash interface pin arrangement and a clock (CLK) pin. The synchronous NAND interface is configured to interface with a NOR-compatible memory interface.Type: GrantFiled: March 20, 2008Date of Patent: August 14, 2012Assignee: Qimonda AGInventors: Marco Redaelli, Oreste Bernardi
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Publication number: 20120110374Abstract: Some embodiments of the invention relate to an embedded processing system. The system includes a memory unit to store a plurality of operating instructions and a processing unit coupled to the memory unit. The processing unit can execute logical operations corresponding to respective operating instructions. An input/output (I/O) interface receives a first time-varying waveform and provides an I/O signal that is based on the first time-varying waveform. A comparison unit coupled to the processing unit and adapted to selectively assert an error signal based on whether the I/O signal has a predetermined relationship with a reference signal, wherein the predetermined relationship holds true during normal operation but fails to hold true when an unexpected event occurs and causes an unexpected change at least one of the I/O signal and reference signal.Type: ApplicationFiled: October 29, 2010Publication date: May 3, 2012Applicant: Infineon Technologies AGInventors: Simon Brewerton, Patrick Leteinturier, Oreste Bernardi, Antonio Vilela, Klaus Scheibert, Jens Barrenscheen
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Patent number: 7831742Abstract: An embodiment of the invention describes a method for enumeration. The method includes assigning a second number to a device of a plurality of devices, wherein each device of the plurality of devices has a different unique first number. The method includes comparing at least portions of the first numbers and assigning a second number to one of the plurality of devices depending on the result of the comparison.Type: GrantFiled: August 10, 2007Date of Patent: November 9, 2010Assignee: Qimonda AGInventor: Oreste Bernardi
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Publication number: 20090238001Abstract: A NAND-type flash memory device is described. In some embodiments, the memory device includes NAND-type flash memory cells, and a synchronous NAND interface. The synchronous NAND interface includes a standard NAND flash interface pin arrangement and a clock (CLK) pin. The synchronous NAND interface is configured to interface with a NOR-compatible memory interface.Type: ApplicationFiled: March 20, 2008Publication date: September 24, 2009Inventors: Marco Redaelli, Oreste Bernardi
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Publication number: 20090043932Abstract: An embodiment of the invention describes a method for enumeration. The method includes assigning a second number to a device of a plurality of devices, wherein each device of the plurality of devices has a different unique first number. The method includes comparing at least portions of the first numbers and assigning a second number to one of the plurality of devices depending on the result of the comparison.Type: ApplicationFiled: August 10, 2007Publication date: February 12, 2009Inventor: Oreste Bernardi
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Patent number: 7149844Abstract: A non-volatile memory device is proposed. The non-volatile memory device includes a flash memory and means for executing external commands, the external commands including a first subset of commands for accessing the flash memory directly; the memory device further includes a programmable logic unit and means for storing program code for the logic unit, the external commands including a second subset of at least one command for causing the logic unit to process information stored in at least one portion of the flash memory under the control of the program code.Type: GrantFiled: March 14, 2003Date of Patent: December 12, 2006Assignee: STMicroelectronics S.R.L.Inventors: Oreste Bernardi, Marco Redaelli, Corrado Villa
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Patent number: 6830951Abstract: The invention relates to a process for manufacturing a light sensor device in a standard CMOS process, including at least the following phases: implanting active areas on a semiconductor substrate to obtain at least a first, a second and a third integrated region of corresponding photosensors; forming a stack of layers of different thickness and refractive index layers over the photosensors to provide an interferential filter for said photosensors. The stack is obtained by a deposition of a first oxide stack including a first, a second and a third oxide layer over at least one photosensor; moreover, this third oxide layer is obtained by a deposition step of an protecting undoped premetal dielectric layer.Type: GrantFiled: September 23, 2002Date of Patent: December 14, 2004Assignee: STMicroelectronics S.r.l.Inventors: Enrico Laurin, Matteo Bordogna, Oreste Bernardi
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Publication number: 20030210585Abstract: A non-volatile memory device is proposed. The non-volatile memory device includes a flash memory and means for executing external commands, the external commands including a first subset of commands for accessing the flash memory directly; the memory device further includes a programmable logic unit and means for storing program code for the logic unit, the external commands including a second subset of at least one command for causing the logic unit to process information stored in at least one portion of the flash memory under the control of the program code.Type: ApplicationFiled: March 14, 2003Publication date: November 13, 2003Applicant: STMicroelectronics S.r.I.Inventors: Oreste Bernardi, Marco Redaelli, Corrado Villa
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Publication number: 20030087486Abstract: The invention relates to a process for manufacturing a light sensor device in a standard CMOS process, including at least the following phases: implanting active areas on a semiconductor substrate to obtain at least a first, a second and a third integrated region of corresponding photosensors; forming a stack of layers of different thickness and refractive index layers over the photosensors to provide an interferential filter for said photosensors. The stack is obtained by a deposition of a first oxide stack including a first, a second and a third oxide layer over at least one photosensor; moreover, this third oxide layer is obtained by a deposition step of an protecting undoped premetal dielectric layer.Type: ApplicationFiled: September 23, 2002Publication date: May 8, 2003Applicant: STMicroelectronics S.r.l.Inventors: Enrico Laurin, Matteo Bordogna, Oreste Bernardi
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Patent number: 6538267Abstract: The invention relates to a process for manufacturing a light sensor device in a standard CMOS process, including, implanting active areas on a semiconductor substrate to obtain a first integrated region of a corresponding photosensor; and forming a stack of layers having different thickness and refractive index layers over the photosensor to provide interferential filters for the same photosensor. At least one of the above mentioned layers is formed by a transparent metallic oxide having a high refraction index and a corresponding high dielectric constant. In this manner, due to the transparency of the high refraction index material, the design of interferential resonators is rendered more flexible making possible the use of a stack of layers including more than one high refraction index layer.Type: GrantFiled: October 3, 2001Date of Patent: March 25, 2003Assignee: STMicroelectronics S.r.l.Inventors: Matteo Bordogna, Enrico Laurin, Oreste Bernardi
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Patent number: 6352876Abstract: The invention relates to a process for manufacturing a light sensor device in a standard CMOS process, including, implanting active areas on a semiconductor substrate to obtain a first integrated region of a corresponding photosensor; and forming a stack of layers having different thickness and refractive index layers over the photosensor to provide interferential filters for the same photosensor. At least one of the above mentioned layers is formed by a transparent metallic oxide having a high refraction index and a corresponding high dielectric constant. In this manner, due to the transparency of the high refraction index material, the design of interferential resonators is rendered more flexible making possible the use of a stack of layers including more than one high refraction index layer.Type: GrantFiled: July 27, 2000Date of Patent: March 5, 2002Assignee: STMicroelectronics S.r.l.Inventors: Matteo Bordogna, Enrico Laurin, Oreste Bernardi
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Publication number: 20020019070Abstract: A process for manufacturing a light sensor device in a standard CMOS process, including at least the following phases: implanting active areas on a semiconductor substrate to obtain at least a first, a second and a third integrated region of corresponding photosensors; forming a stack of layers of different thickness and refractive index layers over the photosensors to provide an interferential filter to said photosensors. The stack is obtained by a deposition of a first oxide stack including a first, a second and a third oxide layer over at least one photosensor; moreover, this third oxide layer is obtained by a deposition step of an protecting undoped premetal dielectric layer.Type: ApplicationFiled: July 28, 1999Publication date: February 14, 2002Inventors: ENRICO LAURIN, MATTEO BORDOGNA, ORESTE BERNARDI
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Publication number: 20020011638Abstract: The invention relates to a process for manufacturing a light sensor device in a standard CMOS process, including, implanting active areas on a semiconductor substrate to obtain a first integrated region of a corresponding photosensor; and forming a stack of layers having different thickness and refractive index layers over the photosensor to provide interferential filters for the same photosensor. At least one of the above mentioned layers is formed by a transparent metallic oxide having a high refraction index and a corresponding high dielectric constant. In this manner, due to the transparency of the high refraction index material, the design of interferential resonators is rendered more flexible making possible the use of a stack of layers including more than one high refraction index layer.Type: ApplicationFiled: October 3, 2001Publication date: January 31, 2002Inventors: Matteo Bordogna, Enrico Laurin, Oreste Bernardi