Abstract: A memory system may monitor a bit error rate in data read from a memory in the memory system. The memory system may determine that the monitored bit error rate satisfies an acceptable memory error condition. The memory system may adjust operation of the memory system to decrease the power consumption of the memory system, wherein the adjusted operation results in a new bit error rate monitored from data read from the memory that satisfies the acceptable memory error condition.

Abstract: Methods, systems, and computer storage media for providing compute management using a compute management engine in an artificial intelligence (AI) system. A compute management engine supports dynamically switching between two modes of operation for an inference phase of a generative artificial AI model. The compute management engine employs a bypass engine that causes prompt stage operations to be executed without an in-memory compute engine and causes auto-regression stage operations to be executed with the in-memory compute engine. In operation, an inference phase operation is accessed. When the inference phase operation is a prompt stage operation, the inference phase operation is executed without an in-memory compute engine. When the inference phase operation is an auto-regressive stage operation, the inference phase operation is executed with the in-memory compute engine.

Abstract: A method comprises receiving a read instruction and determining a read address in computer memory corresponding to the read instruction, where the read address references a cell within a row of read-destructive computer memory. The method further comprises determining a discard state for data stored in the row according to a usage of the data, the discard state being positive for data to be read only once and negative for data to be read more than once. The data is read from the row and written back to the row if the discard state is negative. If the discard state is positive, then the method returns without writing the data back to the row.

Abstract: Computing devices and methods of upscaling video data are disclosed. In one example a method of upscaling video data comprises generating first resolution video data comprising a plurality of tiles that each comprise a plurality of pixels. The method determines whether a first tile of the plurality of tiles matches a previously-received version of the first tile. At least on condition that the first tile does not match the previously-received version of the first tile, the first tile is upscaled from a first resolution to a second resolution greater than the first resolution. The method determines whether a second tile of the plurality of tiles matches a previously-received version of the second tile. At least on condition that the second tile matches the previously-received version of the second tile, the method refrains from upscaling the second tile from the first resolution to the second resolution.

Abstract: A logic circuit includes an input data line, and a zero-detection element configured to output a latch control signal with a first state based at least in part on detecting that a current input value on the input data line is equal to zero. A latch is configured to receive the current input value and output a latch output value, wherein the latch output value is a prior input value based at least in part on the latch control signal having the first state, and wherein the latch output value is the current input value based at least in part on the latch control signal having a second state. A multiplier performs a multiplication operation based at least in part on the latch output value.

Abstract: A method for computer memory access includes, during execution of a machine learning model, receiving an input vector for multiplication with a matrix of network weight values. Each network weight value of the matrix of network weight values is stored in computer memory using a stored quantity(S) of bits. For a network weight value of the matrix of network weight values, a representation quantity (R) of bits is determined to be used for representing the network weight value during multiplication with a corresponding vector value of the input vector, based at least in part on a magnitude of the corresponding vector value. The R bits of the network weight value are retrieved from the computer memory for multiplication with the corresponding vector value.

Abstract: A memory where video content is stored for access by processing components in a display pipeline is divided into different categories or groupings, each different category or grouping corresponding to a different security level. Access, by the processing components in the display pipeline, to the video content stored in the different categories or groupings is restricted in different ways so that access to video content stored in the highest security categories or groupings is more restricted and more secure than access to the video content stored in a less secure categories or groupings. Video content is received and a security level corresponding to video content is identified. The video content is written into a memory category or grouping, of the plurality of different categories or groupings corresponding to a plurality of different security levels, based upon the security level corresponding to the video content.

Abstract: Methods and systems are described which facilitate protecting a virtual desktop infrastructure (VDI) session. A first communication channel is established between a first cryptographic element and a VDI service. The first cryptographic element decrypts a video stream from the VDI service and overlays the decrypted video stream on a user's display. A second communication channel is established between a second cryptographic element and the VDI service. The second cryptographic element encrypts input received at a user's input device and sends the encrypted input to the cloud VDI service.

Abstract: Methods and systems are described which facilitate protecting a virtual desktop infrastructure (VDI) session. A first communication channel is established between a DRM component and a VDI service. The DRM component decrypts a video stream from the VDI service and overlays the decrypted video stream on a user's display. A second communication channel is established between an inputs protection component and the VDI service. The inputs protection component encrypts input received at a user's input device and sends the encrypted input to the cloud VDI service.

Abstract: A memory system may monitor a bit error rate in data read from a memory in the memory system. The memory system may determine that the monitored bit error rate satisfies an acceptable memory error condition. The memory system may adjust operation of the memory system to decrease the power consumption of the memory system, wherein the adjusted operation results in a new bit error rate monitored from data read from the memory that satisfies the acceptable memory error condition.

Abstract: An apparatus and method for synchronizing a triggered system to a triggering system by tracking the timing of rising and falling edges of a clock signal at the triggered system and using the tracked timing values for phase shift adjustment of a time base at the triggered systems.

Abstract: Examples are disclosed that relate to handling noise interference on an interlink connecting hardware devices. One example provides a computing system comprising a first hardware device, a second hardware device, an interlink connecting the first hardware device and the second hardware device, a logic system, and a storage system. The storage system comprises instructions executable by the logic system to operate the interlink in an intermittently active mode, detect a noise interference scenario on the interlink, and in response, set a persistent active mode for the interlink.

Abstract: Examples are disclosed that relate to handling noise interference on an interlink connecting hardware devices. One example provides a computing system comprising a first hardware device, a second hardware device, an interlink connecting the first hardware device and the second hardware device, a logic system, and a storage system. The storage system comprises instructions executable by the logic system to operate the interlink in an intermittently active mode, detect a noise interference scenario on the interlink, and in response, set a persistent active mode for the interlink.

Abstract: An apparatus and method for synchronizing a triggered system to a triggering system by tracking the timing of rising and falling edges of a clock signal at the triggered system and using the tracked timing values for phase shift adjustment of a time base at the triggered systems.

Abstract: Methods and devices for communicating or interacting by a pen or a stylus with a digitizer are disclosed. An example method describes determining whether the device is to transmit a first information to the digitizer via the electrode or receive a second information from the digitizer via the electrode. An example device for use with the method includes a transmitter circuit, a receiver circuit, and an electrode. The method further includes isolating the electrode from the transmitter circuit in response to determining that the device is to receive the second information from the digitizer via the electrode.

Abstract: In various examples there is a stylus for use with a digitizer. The stylus comprises a shaft running on a longitudinal axis of the stylus and having a stylus tip at a tip end of the shaft. The stylus has a vibration generator configured to vibrate the stylus tip along the longitudinal axis. The stylus also has a detector configured to detect the vibration causing the stylus tip to contact a surface external to the stylus.

Abstract: In various examples there is a stylus for use with a digitizer. The stylus comprises a shaft running on a longitudinal axis of the stylus and having a stylus tip at a tip end of the shaft. The stylus has a vibration generator configured to vibrate the stylus tip along the longitudinal axis. The stylus also has a detector configured to detect the vibration causing the stylus tip to contact a surface external to the stylus.

Abstract: In various examples there is a capacitance measurement circuit for measuring capacitance of an electrode. The circuit comprises a charging/discharging circuit part which charges the electrode or discharges the electrode, and a counter which measures a charging measurement being a time taken by the charging/discharging circuit part to charge the electrode between two charging thresholds, and which measures a discharging measurement being a time taken by the charging/discharging circuit part to discharge the electrode between two discharging thresholds. The circuit has a controller configured to control the charging/discharging circuit part and the counter such that a plurality of discharging measurements are obtained and a plurality of charging measurements are obtained. The circuit has an averaging logic which computes the measured capacitance in relation to an average of the measurements.

Abstract: In various examples there is an apparatus for sensing a touch event. The apparatus has a plurality of transmit electrodes arranged to carry a signal, each of the transmit electrodes comprising a transmit body section and a transmit bridge section. The apparatus has a plurality of receive electrodes arranged to receive the signal via electrostatic coupling with the transmit electrodes, each of the receive electrodes comprising a receive body section and a receive bridge section. Individual ones of the transmit and receive bridge sections are arranged to cross such that a gap is formed between the transmit and receive bridge sections. One or more regions of floating conductive material are positioned in proximity to the transmit and receive body sections, each region comprising one or more members of conductive material extending into the gaps.

Abstract: In various examples there is an apparatus for sensing a touch event. The apparatus has a plurality of transmit electrodes arranged to carry a signal, each of the transmit electrodes comprising a transmit body section and a transmit bridge section. The apparatus has a plurality of receive electrodes arranged to receive the signal via electrostatic coupling with the transmit electrodes, each of the receive electrodes comprising a receive body section and a receive bridge section. Individual ones of the transmit and receive bridge sections are arranged to cross such that a gap is formed between the transmit and receive bridge sections. One or more regions of floating conductive material are positioned in proximity to the transmit and receive body sections, each region comprising one or more members of conductive material extending into the gaps.