Patents by Inventor Orlando F. Torres

Orlando F. Torres has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7271030
    Abstract: A semiconductor device including a contact pad and circuit metallization on the surface of an integrated circuit (IC) chip comprises a stack of protection layers over the surface of the chip. The stack consists of a first inorganic layer (303, preferably silicon nitride) on the chip surface, followed by a polymer layer (306, preferably benzocyclobutene) on the first inorganic layer (303), and finally an outermost second inorganic layer (310, preferably silicon dioxide) on the polymer layer (303). A window (301a) in the stack of layers exposes the metallization (301) of the IC. A patterned seed metal layer (307, preferably copper) is on the metallization (301) in the window and on the second inorganic layer (310) around the window. A buffer metal layer (308, preferably copper) is positioned on the seed metal layer (307). A metal reflow element (309) is attached to the buffer metal (308).
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: September 18, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Christo P. Bojkov, Orlando F. Torres
  • Patent number: 7005752
    Abstract: A semiconductor device including a contact pad and circuit metallization on the surface of an integrated circuit (IC) chip comprises a stack of protection layers over the surface of the chip. The stack consists of a first inorganic layer (303, preferably silicon nitride) on the chip surface, followed by a polymer layer (306, preferably benzocyclobutene) on the first inorganic layer (303), and finally an outermost second inorganic layer (310, preferably silicon dioxide) on the polymer layer (303). A window (301a) in the stack of layers exposes the metallization (301) of the IC. A patterned seed metal layer (307, preferably copper) is on the metallization (301) in the window and on the second inorganic layer (310) around the window. A buffer metal layer (308, preferably copper) is positioned on the seed metal layer (307). A metal reflow element (309) is attached to the buffer metal (308).
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: February 28, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Christo P. Bojkov, Orlando F. Torres
  • Patent number: 6657311
    Abstract: A heat dissipating flip-chip Ball Grid Array (BGA) (10) including a substrate (12), a die (14), a first set of solder balls (16) coupling the die with the substrate, a thermal compound (20) attached to a backside of the die, a second set of solder balls (28) attached to the substrate, and a printed circuit board (22) that includes a heat dissipating metal (24). The heat dissipating metal is in contact with the thermal compound, and the second set of solder balls is connected to thermal vias in the printed circuit board.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: December 2, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Edgardo R. Hortaleza, Orlando F. Torres
  • Publication number: 20030214049
    Abstract: The present invention discloses a heat dissipating flip-chip Ball Grid Array (BGA) (10). In one embodiment, the flip-chip BGA comprises a substrate (12), a die (14), a first set of solder balls (16) adapted to couple the die with the substrate, a thermal compound (20) adapted to couple to a backside of the die, a second set of solder balls (28) adapted to couple with the substrate, and a printed circuit board (22) comprising a heat dissipating metal (24), wherein the heat dissipating metal is adapted to couple with the thermal compound, and wherein the second set of solder balls is adapted to couple with the printed circuit board.
    Type: Application
    Filed: May 16, 2002
    Publication date: November 20, 2003
    Inventors: Edgardo R. Hortaleza, Orlando F. Torres
  • Patent number: 5960262
    Abstract: A method of bonding a wire between a semiconductor die pad and a lead finger of a lead frame which includes providing a capillary having a bore and a wire pigtail extending through the bore and externally of the capillary. A ball is formed with the pigtail, a semiconductor die pad is provided and a ball bond is formed on the die pad with the ball. A lead frame finger is provided and the capillary and the wire threaded through the bore are moved to the lead frame finger. A stitch bond is formed on the lead finger with the capillary. The capillary is moved from the stitch bond with a pigtail of the wire extending out of the bore of the capillary. A second ball is formed with the pigtail and the capillary is again moved toward the stitch bond until the second ball contacts the stitch bond. A ball bond is then formed over and secured to the stitch bond and to the lead frame finger.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: September 28, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Orlando F. Torres, Edgardo R. Hortaleza