Patents by Inventor Orlando LAZARO

Orlando LAZARO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240372462
    Abstract: Control circuits for DC-DC power converters. In one example, a control circuit includes a voltage control loop configured to produce a control voltage based on an output voltage of a DC-DC converter and a reference voltage, and a current control loop configured to produce a control current based on the control voltage. The current control loop may be further configured to adjust the control current based on a signal proportional to an input voltage of the DC-DC converter to provide an adjusted control current that is inversely proportional to the input voltage, and to produce, based on the adjusted control current and an inductor current in an inductor of the DC-DC converter, a drive signal to drive one or more power transistors of the DC-DC converter.
    Type: Application
    Filed: March 26, 2024
    Publication date: November 7, 2024
    Inventors: Kevin Scoones, Orlando Lazaro, Ntiamoah Kwarteng
  • Publication number: 20240364219
    Abstract: A power converter includes a power stage circuit having a control input and an output. A pulse width modulation (PWM) controller has a control output coupled to the control input of the power stage. A compensator includes a passive component and a switch coupled to the passive component. The switch has a switch control input coupled to the control output of the PWM controller.
    Type: Application
    Filed: August 18, 2023
    Publication date: October 31, 2024
    Inventors: Kevin Scoones, Youngbok Kim, Orlando Lazaro, Reza Sharifi
  • Publication number: 20240288890
    Abstract: In one example, an apparatus comprises a voltage reference circuit. The voltage reference circuit has a voltage reference terminal and includes a first circuit, a first semiconductor junction device, and a second semiconductor junction device coupled between the voltage reference terminal and a ground terminal. The first circuit is configured to generate a first voltage that increases with a temperature. The first semiconductor junction device is configured to generate a second voltage that decreases with the temperature. The second semiconductor junction device is configured to generate a third voltage that decreases with the temperature. The voltage reference circuit is configured to generate a fourth voltage between the voltage reference terminal and the ground terminal based on a sum of the first voltage and a combination of the second and third voltages.
    Type: Application
    Filed: February 23, 2023
    Publication date: August 29, 2024
    Applicant: Texas Instruments Incorporated
    Inventors: Sowmya Sankaranarayanan, Orlando Lazaro, Kevin Scoones, Avinash Bhat
  • Publication number: 20240283354
    Abstract: An apparatus comprises a transmitter circuit having first and second transmit outputs; a rectifier circuit having first and second rectifier inputs and first and second rectifier outputs; an isolation circuit coupled between the first transmit output and the first rectifier input, and between the second transmit output and the second rectifier input; a detector circuit coupled to the rectifier circuit; and a driver circuit having a power terminal, a reference terminal, a driver input, and a driver output, the power terminal coupled to the first rectifier output, the reference terminal coupled to the second rectifier output, and the driver input coupled to an output of the detector circuit.
    Type: Application
    Filed: May 2, 2024
    Publication date: August 22, 2024
    Applicant: Texas Instruments Incorporated
    Inventors: Timothy Bryan Merkin, Orlando Lazaro, John Russell Broze, Nan Xing
  • Publication number: 20240282854
    Abstract: IC apparatus, and manufacturing methods therefor, that include a power transistor and a thermoelectric device. The power transistor is constructed in a plurality of layers formed over a semiconductor substrate. The thermoelectric device is formed in one or more of the plurality of layers and is sensitive to temperature differences within the IC apparatus resulting from operation of the power transistor.
    Type: Application
    Filed: May 3, 2024
    Publication date: August 22, 2024
    Inventors: Henry Litzmann Edwards, Andres Arturo Blanco, Orlando Lazaro
  • Publication number: 20240258999
    Abstract: The present disclosure introduces integrated circuits and related manufacturing methods, wherein each integrated circuit includes an electronic device and a thermoelectric circuit. The electronic device is formed in and/or over a semiconductor substrate. The thermoelectric circuit includes thermopiles formed in and/or over the semiconductor substrate and electrically connected in series. The thermoelectric circuit is configured to modulate operation of the electronic device in response to a potential produced by the plurality of thermopiles.
    Type: Application
    Filed: January 31, 2023
    Publication date: August 1, 2024
    Inventors: Orlando Lazaro, Henry Litzmann Edwards, Andres Arturo Blanco, Kushal D. Murthy, Ankur Chauhan
  • Patent number: 12034378
    Abstract: A method includes charging a capacitor of a power inverter to a direct current (DC) input voltage from an input terminal of the power inverter. The capacitor has first and second terminals. The method also includes providing a first voltage at an output terminal of the power inverter at a first time by controlling one of either: an output switch that selectively couples the output terminal to either the first terminal or the second terminal; or a set of input switches that selectively couple the first and second terminals to either the input terminal or a ground terminal. The method further includes providing a second voltage at the output terminal at a second time by controlling the other of the output switch or the set of input switches.
    Type: Grant
    Filed: November 11, 2022
    Date of Patent: July 9, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Orlando Lazaro, Yogesh Kumar Ramadass, Nan Xing
  • Patent number: 11984504
    Abstract: IC apparatus, and manufacturing methods therefor, that include a power transistor and a thermoelectric device. The power transistor is constructed in a plurality of layers formed over a semiconductor substrate. The thermoelectric device is formed in one or more of the plurality of layers and is sensitive to temperature differences within the IC apparatus resulting from operation of the power transistor.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: May 14, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Henry Litzmann Edwards, Andres Arturo Blanco, Orlando Lazaro
  • Patent number: 11984802
    Abstract: An electronic device has a first circuit, a second circuit, and an isolation circuit, the isolation circuit having an input and an output, the first circuit including a signal generator having an output, the output of the signal generator coupled to the input of the isolation circuit. The second circuit includes a rectifier circuit and a signal detector circuit, the rectifier circuit having a rectifier input coupled to the output of the isolation circuit, and the signal detector circuit having an input coupled to the output of the isolation circuit.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: May 14, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Timothy Bryan Merkin, Orlando Lazaro, John Russell Broze, Nan Xing
  • Publication number: 20240146254
    Abstract: A power transistor includes an ambient temperature input, a local temperature sensor, an array of transistor cells, and a thermal feedback circuit. The ambient temperature input is configured to receive an ambient temperature signal that is representative of an ambient temperature of the power transistor. The array of transistor cells has a control input. The local temperature sensor is configured to provide a local temperature signal that is representative of a temperature of the array of transistor cells. The thermal feedback circuit is coupled to the ambient temperature input, the local temperature sensor, and the control input. The thermal feedback circuit is configured to modulate a control signal provided at the control input based on a difference between the ambient temperature signal and the local temperature signal.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Inventors: Ankur CHAUHAN, Orlando LAZARO, Kushal MURTHY, Andres BLANCO, Henry EDWARDS
  • Publication number: 20230353042
    Abstract: Examples of this description include providing a first control signal having an asserted value at a first control terminal of a controllable resistive element at a first time. Examples of this description also include providing a second control signal having an asserted value at a control terminal of a high-side power transistor of a power converter subsequent to providing the first control signal, wherein the controllable resistive element snubs the high-side power transistor.
    Type: Application
    Filed: April 25, 2023
    Publication date: November 2, 2023
    Inventor: Orlando LAZARO
  • Publication number: 20230335547
    Abstract: The present disclosure generally relates to biasing an isolation region in a semiconductor substrate. In an example, an integrated circuit includes a semiconductor substrate, a first rectifying device, and a second rectifying device. The semiconductor substrate has a first region, a second region, and a third region each being an opposite conductivity type from the semiconductor substrate. The first region and the second region are respective current terminals of a transistor. The first rectifying device has a first positive terminal and a first negative terminal. The first positive terminal is coupled to the first region, and the first negative terminal is coupled to the third region. The second rectifying device has a second positive terminal and a second negative terminal. The second positive terminal is coupled to a ground terminal, and the second negative terminal is coupled to the third region.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 19, 2023
    Inventors: Orlando Lazaro, John Russell Broze, Timothy Bryan Merkin
  • Publication number: 20230314484
    Abstract: In one example, an apparatus comprises: a first transistor coupled between a power terminal and a switching terminal; a second transistor coupled between the power terminal and a first sense terminal; a third transistor coupled between the switching terminal and a ground terminal; a fourth transistor coupled between a second sense terminal and the ground terminal; a first variable current source coupled to the first sense terminal; a second variable current source coupled to the second sense terminal; a processing circuit having first, second, third, and fourth inputs and first and second outputs, the first input coupled to the switching terminal, the second input coupled to the first sense terminal, the third input coupled to the ground terminal, the fourth input coupled to the second sense terminal, the first output coupled to the first variable current source, and the second output coupled to the second variable current source.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 5, 2023
    Applicant: Texas Instruments Incorporated
    Inventors: Kevin Scoones, Vamsinath Peddireddy, Orlando Lazaro
  • Publication number: 20230157175
    Abstract: Integrated circuit apparatus, and their manufacturing methods, including an integrated power transistor and thermocouple. The power transistor is constructed in a plurality of layers formed over a semiconductor substrate. The thermocouple includes a p-thermopile and an n-thermopile that are each electrically isolated from the power transistor and the semiconductor substrate while being sensitive to temperature differences within the IC resulting from operation of the power transistor. The p-thermopile includes a p-type thermoelectric body formed in a p-type one or more of the plurality of layers. The n-thermopile includes n-type thermoelectric body formed in an n-type one or more of the plurality of layers.
    Type: Application
    Filed: November 17, 2021
    Publication date: May 18, 2023
    Inventors: Henry Litzmann Edwards, Andres Arturo Blanco, Orlando Lazaro
  • Publication number: 20230155023
    Abstract: IC apparatus, and manufacturing methods therefor, that include a power transistor and a thermoelectric device. The power transistor is constructed in a plurality of layers formed over a semiconductor substrate. The thermoelectric device is formed in one or more of the plurality of layers and is sensitive to temperature differences within the IC apparatus resulting from operation of the power transistor.
    Type: Application
    Filed: November 30, 2021
    Publication date: May 18, 2023
    Inventors: Henry Litzmann Edwards, Andres Arturo Blanco, Orlando Lazaro
  • Publication number: 20230072847
    Abstract: A method includes charging a capacitor of a power inverter to a direct current (DC) input voltage from an input terminal of the power inverter. The capacitor has first and second terminals. The method also includes providing a first voltage at an output terminal of the power inverter at a first time by controlling one of either: an output switch that selectively couples the output terminal to either the first terminal or the second terminal; or a set of input switches that selectively couple the first and second terminals to either the input terminal or a ground terminal. The method further includes providing a second voltage at the output terminal at a second time by controlling the other of the output switch or the set of input switches.
    Type: Application
    Filed: November 11, 2022
    Publication date: March 9, 2023
    Inventors: Orlando Lazaro, Yogesh Kumar Ramadass, Nan Xing
  • Patent number: 11594959
    Abstract: A switched capacitor voltage multiplication device has a rectifier with a DC input terminal and a DC output terminal and two pulse input terminals. A first flying capacitor is coupled to one of the pulse input terminals, while a second flying capacitor is coupled to the other pulse input terminal. A recycle resistor is coupled across the rectifier with a first resistor terminal coupled to one pulse input terminal and a second resistor terminal coupled to the other pulse input terminal.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: February 28, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Timothy Bryan Merkin, John Russell Broze, Orlando Lazaro
  • Publication number: 20230006541
    Abstract: An electronic device has a first circuit, a second circuit, and an isolation circuit, the isolation circuit having an input and an output, the first circuit including a signal generator having an output, the output of the signal generator coupled to the input of the isolation circuit. The second circuit includes a rectifier circuit and a signal detector circuit, the rectifier circuit having a rectifier input coupled to the output of the isolation circuit, and the signal detector circuit having an input coupled to the output of the isolation circuit.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Applicant: Texas Instruments Incorporated
    Inventors: Timothy Bryan Merkin, Orlando Lazaro, John Russell Broze, Nan Xing
  • Publication number: 20230001815
    Abstract: An example apparatus includes: a gate driver with a control output terminal, a power transistor with a gate terminal and a first current terminal, the gate terminal coupled to the control output terminal, and drain-derived supply circuitry with an output coupled to the first current terminal.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Inventors: Orlando Lazaro, Timothy Bryan Merkin, Yogesh Kumar Ramadass
  • Patent number: 11515839
    Abstract: A system includes a power receiver including an oscillator with a first coil and a second coil. The oscillator includes a first field effect transistor (FET) having first gate, first source, and first drain terminals, the first drain terminal coupled to the first coil, the first coil adapted to be inductively coupled to a third coil in a power transmitter. The oscillator also includes a first capacitor coupled to the first coil. The oscillator includes a second FET having second gate, second source, and second drain terminals, the second gate terminal coupled to the first capacitor, the second source terminal coupled to the first source terminal, and the second drain terminal coupled to the second coil, the second coil adapted to be inductively coupled to a fourth coil in the power transmitter. The oscillator includes a second capacitor coupled to the first gate terminal and coupled to the second coil.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: November 29, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Orlando Lazaro