Abstract: A power factor correction (PFC) stage, controller, and control method are described. The PFC stage includes: a totem-pole converter having an input inductor for coupling to ac mains, first and second pairs of power switches, and an output capacitor for coupling to a bus; an auxiliary capacitor having a lower capacitance than the output capacitor; and a circuit configured to couple the auxiliary capacitor in parallel with the output capacitor in a first state and to the input inductor in a second state; and a controller. If a line drop out (LDO) condition is detected on the bus, the controller sets the circuit in the second state and operate the first pair of power switches as a DC-DC boost converter under peak current control. If no LDO condition is detected on the bus, the controller sets the circuit in the first state and operate the totem-pole converter under average current control.

Abstract: In some examples, a controller includes a startup generation circuit configured to control, while operating in a first phase of a startup mode, a bridge circuit using peak detection and using zero-crossing detection of an electrical current through a tank circuit coupled to the bridge circuit. The startup generation circuit is also configured to control the bridge circuit using the zero-crossing detection while operating in a second phase of the startup mode after the first phase. The startup generation circuit is further configured to control the bridge circuit using a discontinuous-current mode for the electrical current while operating in a third phase of the startup mode after the second phase. The controller also includes a steady-state generation circuit configured to control the bridge circuit using soft switching while operating in a steady-state mode after the third phase of the startup mode.

Abstract: In some examples, a controller includes a startup generation circuit configured to control, while operating in a first phase of a startup mode, a bridge circuit using peak detection and using zero-crossing detection of an electrical current through a tank circuit coupled to the bridge circuit. The startup generation circuit is also configured to control the bridge circuit using the zero-crossing detection while operating in a second phase of the startup mode after the first phase. The startup generation circuit is further configured to control the bridge circuit using a discontinuous-current mode for the electrical current while operating in a third phase of the startup mode after the second phase. The controller also includes a steady-state generation circuit configured to control the bridge circuit using soft switching while operating in a steady-state mode after the third phase of the startup mode.

Abstract: In some examples, a power converter includes a first bridge circuit, a second bridge circuit, and a transformer, where a first side of the transformer is coupled to the first bridge circuit. The power converter further includes a first LC tank circuit coupled to a second side of the transformer and a second LC tank circuit coupled to the first LC tank circuit and coupled to the second bridge circuit.

Abstract: A total harmonic distortion (THDi) reduction circuit for a power factor correction (PFC) controller to control a PFC stage. The THDi reduction circuit determines whether an input signal, such as an alternating current (AC) line voltage is a high voltage or low voltage signal. For a high voltage input signal, the THDi reduction circuit may limit the duty cycle of a control signal to a PFC stage to minimize a voltage spike at the zero-crossing point of the input signal and thereby minimize THDi. For a low voltage input signal, the THDi reduction circuit may extend the duty cycle of the control signal to the PFC stage, while ensuring that the control signal has at least a predetermined off-time, i.e. the duty cycle is less than 100 percent. Extending the control signal duty cycle, especially for low voltage input signals under high load, may minimize THDi.