Patents by Inventor Osamu Hideshima

Osamu Hideshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020111004
    Abstract: In a semiconductor device having a fuse and an etching stopper film covering the fuse, an optical window exposing the etching stopper film and a contact hole exposing a conductor pattern are formed simultaneously. By applying a dry etching process further to the etching stopper film, an insulation film covering the fuse is exposed in the optical window.
    Type: Application
    Filed: April 18, 2002
    Publication date: August 15, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Seiichi Suzuki, Kazuhiro Adachi, Masaya Katayama, Noriyuki Suzuki, Osamu Hideshima, Kenichi Kawabata, Masaya Ohtsuki, Manabu Hayashi, Junichi Yayanagi
  • Patent number: 6399472
    Abstract: In a semiconductor device having a fuse and an etching stopper film covering the fuse, an optical window exposing the etching stopper film and a contact hole exposing a conductor pattern are formed simultaneously. By applying a dry etching process further to the etching stopper film, an insulation film covering the fuse is exposed in the optical window.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: June 4, 2002
    Assignee: Fujitsu Limited
    Inventors: Seiichi Suzuki, Kazuhiro Adachi, Masaya Katayama, Noriyuki Suzuki, Osamu Hideshima, Kenichi Kawabata, Masaya Ohtsuki, Manabu Hayashi, Junichi Yayanagi
  • Patent number: 5114229
    Abstract: An apparatus for measuring deviations of positions of leads of an electrical component comprises a light emitting unit for radiating a laser light from below toward the leads projecting from a molding of the electrical component sucked to a nozzle of a pick and place head. First and second photodetectors are disposed at both sides of the light emitting unit for detecting laser lights reflected at the leads, so as to enable to effect the measurement rapidly and accurately.
    Type: Grant
    Filed: November 6, 1990
    Date of Patent: May 19, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Osamu Hideshima
  • Patent number: 4698127
    Abstract: Using a single mask pattern on a semiconductor substrate, a doped base contact region adjacent to the surface of the substrate, a buried insulating region below the base contact region, and an insulating layer on the base contact region, and optionally, a metal or metal silicide base-electrode-taking-out layer on the base contact region, are formed, respectively. Doped emitter and intrinsic base regions are formed below the mask pattern. A collector region is defined by the base contact region and the buried insulating layer to be inside thereof, i.e., below the mask pattern. Thus, a bipolar transistor is formed in a size that is essentially necessary, thereby reducing the collector-base capacitance, the base resistance, and the size of the device.
    Type: Grant
    Filed: April 10, 1986
    Date of Patent: October 6, 1987
    Assignee: Fujitsu Limited
    Inventors: Osamu Hideshima, Hiroshi Goto