Abstract: In an antenna device comprising an antenna block which can electrically control a direction of a radio wave transmitted or received by the antenna device, a phase shift unit is connected to the antenna block to phase shift an external electric signal or an internal electric signal given to or from the antenna device. The phase shift unit has variable and discrete phase shifts switched from one to another in response to a control signal supplied from a controller and supplies a phase shifted external signal to the antenna block or a phase shifted internal signal to an external device. The antenna block comprises a plurality of antenna elements and a plurality of phase shifters which are connected to the antenna elements to send the phase shifted external signal to the respective antenna elements or to send the internal electric signal to the phase shift unit.

Abstract: For processing a multiplied signal into a modified signal in a demodulator circuit, an adder (34) sums up a first, a second, and a third processed signal into a sum signal for use as the modified signal. A first processing circuit (31) processes the multiplied signal into the first processed signal. A second processing circuit (32) processes the multiplied signal into the second processed signal in accordance with a conjugate complex clock and a complex local signal. A third signal processing circuit (33) processes the multiplied signal into the third processed signal in accordance with a complex clock and a conjugate complex local signal. The complex clock signal represents a first complex number. The complex local signal represents a second complex number. The conjugate complex clock signal represents a complex conjugate of the first complex number. The conjugate complex local signal represents a complex conjugate of the second complex number.

Abstract: In order to coherently demodulate an incoming multi-phase PSK analog signal irrespective of large frequency deviation, an automatic frequency feedback loop is provided. An analog baseband signal is generated by multiplying the IF analog signal by a local signal and then is converted into the corresponding digital baseband signal. A multiplier multiplies the digital baseband signal by another local signal. The output of the multiplier is further multiplied and then applied to a plurality of single-tuned filters which are arranged in parallel and have tuning frequencies each different from an adjacent frequency by a predetermined frequency interval. Each of the plurality of single-tuned filters generates a signal for use in carrier recovery, a frequency error signal and a correlation coefficient. Subsequently, one of the plurality of single-tuned filters is selected in a manner wherein the maximum value is detected among the correlation coefficients.

Abstract: A digital output of a quasi-coherent detection circuit is M-th power multiplied and then processed by a set of digital filters to generate signals for coherent detection and clock interpolation. The digital output of the quasi-coherent detection circuit is also fed, through a delay circuit, a coherent detection circuit which in turn processes the digital output of the quasi-coherent detection circuit, using the coherent detection signal. Timing error information indicative of the difference between phases of an interpolated clock and the interpolation signal determines the weighting factor of data interpolation channel filter which in turn interpolate and output coherent-detected data signal.

Abstract: A phase-lock loop device for phase locking a device input signal representing a first complex number and having a device input phase which should be locked into a locked phase, includes the following. A first complex multiplier to calculate a first product of the first complex number and a first conjugate complex number to produce a first complex product signal. The first conjugate complex number is represented by a first conjugate signal which is produced by delaying and processing the device input signal. A second complex multiplier to calculate a second product of a phase processed signal and a multiplier input signal to produce a second complex product signal. The phase processed signal is produced by filtering and processing the first complex product signal. The multiplier input signal is produced by delaying and limiting the second complex product signal.

Abstract: A propagation time detecting system wherein a transmitting station transmits to a receiving station, over a plurality of transmitting paths or lines having different propagation times, a transmission signal comprising a sequence of transmission data digitized by a clock signal of a clock frequency. The receiving station receives the transmission signal through the respective transmitting paths or lines as different received signals, and reproduces the sequence of transmission data and the clock signal as different reproduced sequences of transmission data and different reproduced clock signals, from which differences are detected among the different propagation times. In order to improve the accuracy of the detected differences, at least one subcarrier signal with a frequency higher than the clock frequency is also transmitted together with the transmission signal.

Abstract: For use in a satellite communication system which carries out communication through a satellite by the use of an up-link frequency band and a down-link frequency band, each of the up-link and the down-link frequency bands has a plurality of frequency subbands spaced apart from one another with frequency gap bands interposed between the frequency subbands.

Abstract: A satellite communication system includes a plurality of mobile stations which are situated on the earth and a communication satellite which is communicable with the mobile stations by radio signals over a plurality of spot beams. The satellite applies single sideband amplitude modulation (SSB-AM) to analog signals which are sent from the mobile stations, applies digital modulation to coded voice and data, and separates signals in the form of frequency-division-multiplexed (FDM) signals on a channel basis by a transmultiplexer method which is implemented by demultiplexers of a transponder. Baseband matrix means is provided for connecting an output of any of the demultiplexers to one of the spot beams to be transmitted. Further, transmitting means is provided for time-division-multiplexing outputs of the baseband matrix means to form a transmit frame and transmitting it in the form of a TDM signal.

Abstract: A satellite-based vehicle communication/position determination system constituted by N (N.gtoreq.3) geostationary satellites, a plurality of vehicle stations for performing radio-wave exchange with the satellites using a low-directivity antenna, and a base station having high-directivity antennas for independently performing radio-wave exchange with the N geostationary satellites is disclosed. The base station has a communication FDM receiver, N chirp signal receivers for receiving and pulse compressing chirp signals from a vehicle station, which are obtained via the N geostationary satellites, and a circuit for determining the position of the vehicle station based on time differences of compressed pulses from the chirp signal receivers. Each vehicle station has a communication FDM receiver, a transmitter, a chirp signal generator, and a switching control circuit for controlling to selectively output a transmitting signal or the chirp signal.

Abstract: A modulator/demodulator operation mode control system specifies an operation mode, which is a combination of particular data transmission rate, multi-phase PSK modulation system, error-correction coding rate and others, in which a modulator/demodulator is to operate, while deciding the operation mode and controlling the modulator/demodulator. A transmit station designates a particular operation mode in a plurality of bits in terms of polarities of unique words, while a receive station switches a demodulator thereof to the designated operation mode responsive to an output of mode switchover signal decision means and based on signal representative of detection of the unique words.

Abstract: An N-channel FDM signal is converted into complex signals of baseband frequencies spaced at intervals equal to frequency .DELTA.f. The complex baseband signals are converted first into digital samples having a frequency N.DELTA.f and then into N parallel digital signals. A plurality of first FIR subfilters respectively perform filtering on each of the parallel digital signals at frequency .DELTA.f to produce a first series of filtered digital signals from each of the first FIR subfilters, and (m-1) groups of second FIR subfilters respectively perform filtering on each of the parallel digital signals at frequency .DELTA.f to produce a second series of filtered digital samples from each of the second FIR subfilters at timing displaced with respect to the first series by a/m.DELTA.f, where is an integer ranging from unity to (m-1) and m is an integer equal to or greater than 2.

Abstract: An FDM-TDM transmultiplexing system for a modulation/demodulation device which is applicable to a regenerative repeating system of a satellite or a ground radio communication system is disclosed which uses chirp-z-transform. A chirp filter is implemented with a digital circuit. The circuit scale of the digital chirp filter increases in proportion to a square root of the total number of channels N, enhancing miniaturization of an FDM-TDM transmultiplexer.

Abstract: A fast pull-in phase synchronizing circuit, including a phaselock loop, having an extended pull-in range. The phase synchronizing circuit includes, besides a conventional phaselock loop, at least a .pi./2+n.pi. (n being an integer) phase shifter, a mixer, a low pass filter and another mixer. The phase shifter receives the output of the phaselock loop VCO, the output of the phase shifter being multiplied in the mixer with the circuit input signal. This multiplied signal is applied as an input to the low pass filter, which produces a low frequency output proportional to the frequency difference between the input and output signals. This low frequency signal is mixed in the other mixer with the circuit input signal to produce the phaselock loop input signal. The phaselock loop input is phase compared with the VCO output in the phaseback loop phase comparator.

Abstract: An N-phase PSK demodulator is disclosed wherein all circuits therein operate in a frequency band equal to or below the carrier band. The locally reproduced carrier is generated by a phase locked loop in combination with a frequency converter means and a divide-by-two frequency divider. The frequency converter means consists of n identical frequency converter circuits connected in series, where 2.sup.n =N. For a 2-phase PSK demodulator where n=1, the 2-phase PSK modulated wave is applied as a first input and the reproduced carrier divided by two is applied as a second input to the frequency converter circuit. A mixer and filter provide as an output the difference frequency between the first and second inputs. The latter output is multiplied by two and applied as the input to the phase locked loop.