Patents by Inventor Osamu Imafuji

Osamu Imafuji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6815726
    Abstract: A semiconductor device includes: a crystalline substrate including a primary surface and a crystal plane provided within the primary surface so as to have a surface orientation different from a surface orientation of the primary surface; a semiconductor layered structure grown over the crystalline substrate; and an active region provided at a portion in the semiconductor layer structure above the crystal plane.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: November 9, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Ishida, Shinji Nakamura, Kenji Orita, Osamu Imafuji, Masaaki Yuri
  • Patent number: 6773948
    Abstract: A semiconductor light emitting device of the present invention includes: a substrate; a light emitting layer; a semiconductor layer of a hexagonal first III-group nitride crystal; and a cladding layer of a second III-group nitride crystal. A stripe groove is provided in the semiconductor layer along a <1, 1, −2, 0> direction.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: August 10, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinji Nakamura, Masahiro Ishida, Masaaki Yuri, Osamu Imafuji, Kenji Orita
  • Publication number: 20030201441
    Abstract: A semiconductor light emitting device of the present invention includes: a substrate; a light emitting layer; a semiconductor layer of a hexagonal first III-group nitride crystal; and a cladding layer of a second III-group nitride crystal. A stripe groove is provided in the semiconductor layer along a <1, 1, −2, 0> direction.
    Type: Application
    Filed: April 2, 2003
    Publication date: October 30, 2003
    Inventors: Shinji Nakamura, Masahiro Ishida, Masaaki Yuri, Osamu Imafuji, Kenji Orita
  • Publication number: 20030197166
    Abstract: A semiconductor device includes: a crystalline substrate including a primary surface and a crystal plane provided within the primary surface so as to have a surface orientation different from a surface orientation of the primary surface; a semiconductor layered structure grown over the crystalline substrate; and an active region provided at a portion in the semiconductor layer structure above the crystal plane.
    Type: Application
    Filed: March 17, 2003
    Publication date: October 23, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Ishida, Shinji Nakamura, Kenji Orita, Osamu Imafuji, Masaaki Yuri
  • Patent number: 6617182
    Abstract: A semiconductor device includes: a crystalline substrate including a primary surface and a crystal plane provided within the primary surface so as to have a surface orientation different from a surface orientation of the primary surface; a semiconductor layered structure grown over the crystalline substrate; and an active region provided at a portion in the semiconductor layer structure above the crystal plane.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: September 9, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Ishida, Shinji Nakamura, Kenji Orita, Osamu Imafuji, Masaaki Yuri
  • Patent number: 6593159
    Abstract: A sapphire substrate, a buffer layer of undoped GaN and a compound semiconductor crystal layer successively formed on the sapphire substrate together form a substrate of a light emitting diode. A first cladding layer of n-type GaN, an active layer of undoped In0.2Ga0.8N and a second cladding layer successively formed on the compound semiconductor crystal layer together form a device structure of the light emitting diode. On the second cladding layer, a p-type electrode is formed, and on the first cladding layer, an n-type electrode is formed. In a part of the sapphire substrate opposing the p-type electrode, a recess having a trapezoidal section is formed, so that the thickness of an upper portion of the sapphire substrate above the recess can be substantially equal to or smaller than the thickness of the compound semiconductor crystal layer.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: July 15, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadao Hashimoto, Osamu Imafuji, Masaaki Yuri, Masahiro Ishida
  • Patent number: 6566231
    Abstract: A first semiconductor layer is epitaxially grown on a semiconductor substrate and patterned to form concave and convex portions. A second semiconductor layer is formed on the first semiconductor layer using a top epitaxial mask covering the top surface of the convex portion. Lattice defects D propagating from the first semiconductor layer exist only in a region located above the center of the concave portion (a defect region Ra), while in the other region (a low defect region Rb) lattice defects D propagating from the first semiconductor layer hardly exist.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: May 20, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Ogawa, Kenji Orita, Masahiro Ishida, Shinji Nakamura, Osamu Imafuji, Masaaki Yuri
  • Patent number: 6563140
    Abstract: A semiconductor light emitting device of the present invention includes: a substrate; a light emitting layer; a semiconductor layer of a hexagonal first III-group nitride crystal; and a cladding layer of a second III-group nitride crystal. A stripe groove is provided in the semiconductor layer along a <1, 1, −2, 0> direction.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: May 13, 2003
    Assignee: Matsushita Electronics Corporation
    Inventors: Shinji Nakamura, Masahiro Ishida, Masaaki Yuri, Osamu Imafuji, Kenji Orita
  • Patent number: 6546035
    Abstract: A semiconductor laser diode array of this invention contains a first laser diode including a first cladding layer of a first conductivity type formed on a substrate, a first active layer formed on the first cladding layer and a second cladding layer of a second conductivity type formed on the active layer; and a second laser diode including a third cladding layer of the first conductivity type formed on the substrate with a space from the first laser diode, a second active layer formed on the third cladding layer and having a larger energy gap than the first active layer and a fourth cladding layer of the second conductivity type formed on the second active layer. The second laser diode further includes a height adjusting buffer layer of the first conductivity type formed between the substrate and the third cladding layer and having a thickness set for placing the second active layer at substantially the same height from the substrate surface as the height from the substrate surface of the first active layer.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: April 8, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Osamu Imafuji, Masaaki Yuri
  • Publication number: 20030026307
    Abstract: A semiconductor laser has a first conduction-type cladding layer, an active layer, and a second conduction-type cladding layer formed on a first conduction-type semiconductor substrate. The second conduction-type cladding layer has a mesa-type stripe-shaped recessed portion in at least four spots, so as to form a central ridge portion, which constitutes a ridge-type current confinement portion, and two or more lateral ridge portions, which are positioned on both sides of the central ridge portion, have a height larger than to that of the central ridge portion, and include the second conduction-type cladding layer. An insulation film with a lower refractive index than the second conduction-type cladding layer is formed in a pair of stripes disposed respectively in the regions from the side surface of the second conduction-type cladding layer on both side surfaces of the central ridge portion toward the outside. The insulation film is not formed on the central ridge portion.
    Type: Application
    Filed: July 31, 2002
    Publication date: February 6, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Makita, Hideto Adachi, Toshiya Kawata, Hiroshi Asaka, Osamu Imafuji, Toshiya Fukuhisa, Akira Takamori
  • Publication number: 20020137249
    Abstract: A semiconductor device includes: a crystalline substrate including a primary surface and a crystal plane provided within the primary surface so as to have a surface orientation different from a surface orientation of the primary surface; a semiconductor layered structure grown over the crystalline substrate; and an active region provided at a portion in the semiconductor layer structure above the crystal plane.
    Type: Application
    Filed: September 14, 1999
    Publication date: September 26, 2002
    Inventors: MASAHIRO ISHIDA, SHINJI NAKAMURA, KENJI ORITA, OSAMU IMAFUJI, MASAAKI YURI
  • Patent number: 6420197
    Abstract: A semiconductor device comprises a substrate having a first thermal expansion coefficient T1, a strain reducing layer formed on the substrate and having a second thermal expansion coefficient T2, and a semiconductor layer formed on the strain reducing layer, having a third thermal expansion coefficient T3, and made of a nitride compound represented by AlyGa1−y−zInzN (0≦y≦1, 0≦z ≦1). The second thermal expansion coefficient T2 is lower than the first thermal expansion coefficient T1. The third thermal expansion coefficient T3 is lower than the first thermal expansion coefficient T1 and higher than the second thermal expansion coefficient T2.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: July 16, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Ishida, Masaaki Yuri, Osamu Imafuji, Shinji Nakamura, Kenji Orita
  • Publication number: 20020044583
    Abstract: A semiconductor laser device comprises, on top of an active layer, an n-type cladding layer of Alx1Ga1−x1As and a p-type cladding layer of (AlxGa1−x)yIn1−yP for defining a barrier height. The p-type cladding layer for defining a barrier height contains more component elements than the n-type cladding layer. The potential difference between the conduction band edges of the p-type cladding layer for defining a barrier height and the active layer is greater than the potential difference between the conduction band edges of the n-type cladding layer and the active layer. The carriers in the active layer are prevented from overflowing into the p-type cladding layer and a material having a high thermal conductivity is used for the n-type cladding layer to prevent the phenomenon of thermal saturation, thereby providing improved optical output.
    Type: Application
    Filed: October 3, 2001
    Publication date: April 18, 2002
    Inventors: Katsuya Samonji, Toru Takayama, Osamu Imafuji, Masaaki Yuri
  • Patent number: 6339014
    Abstract: A method for growing a nitride compound semiconductor according to the present invention includes the step of growing a compound semiconductor expressed by a general formula AlxGa1-xN (where 0≦×≦1) on a nitride compound semiconductor substrate at a temperature of about 900° C. or more.
    Type: Grant
    Filed: April 13, 1999
    Date of Patent: January 15, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Ishida, Masaaki Yuri, Osamu Imafuji, Tadao Hashimoto, Kenji Orita
  • Publication number: 20010048655
    Abstract: An optical-pick up preventing the deterioration of the optical property by mounting the entire optical system on the movable portion and aligning the optical axis of the semiconductor laser element having the shortest wavelength with the center of the optical axis of the objective lens and an information recording and reproducing apparatus on which the optical pick-up is mounted.
    Type: Application
    Filed: May 30, 2001
    Publication date: December 6, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazutoshi Onozawa, Osamu Imafuji, Masaaki Yuri, Shinichi Ijima
  • Publication number: 20010029086
    Abstract: A first semiconductor layer is epitaxially grown on a semiconductor substrate and patterned to form concave and convex portions. A second semiconductor layer is formed on the first semiconductor layer using a top epitaxial mask covering the top surface of the convex portion. Lattice defects D propagating from the first semiconductor layer exist only in a region located above the center of the concave portion (a defect region Ra), while in the other region (a low defect region Rb) lattice defects D propagating from the first semiconductor layer hardly exist.
    Type: Application
    Filed: February 23, 2001
    Publication date: October 11, 2001
    Inventors: Masahiro Ogawa, Kenji Orita, Masahiro Ishida, Shinji Nakamura, Osamu Imafuji, Masaaki Yuri
  • Publication number: 20010017873
    Abstract: A semiconductor laser diode array of this invention contains a first laser diode including a first cladding layer of a first conductivity type formed on a substrate, a first active layer formed on the first cladding layer and a second cladding layer of a second conductivity type formed on the active layer; and a second laser diode including a third cladding layer of the first conductivity type formed on the substrate with a space from the first laser diode, a second active layer formed on the third cladding layer and having a larger energy gap than the first active layer and a fourth cladding layer of the second conductivity type formed on the second active layer. The second laser diode further includes a height adjusting buffer layer of the first conductivity type formed between the substrate and the third cladding layer and having a thickness set for placing the second active layer at substantially the same height from the substrate surface as the height from the substrate surface of the first active layer.
    Type: Application
    Filed: February 28, 2001
    Publication date: August 30, 2001
    Inventors: Osamu Imafuji, Masaaki Yuri
  • Patent number: 6274518
    Abstract: The present invention provides a method for producing a group III nitride compound semiconductor substrate including: (a) forming a first semiconductor film over a substrate, the first semiconductor film made of a first group III nitride compound semiconductor and provided with a step; (b) forming a second semiconductor film made of a second group III nitride compound semiconductor having a different thermal expansion coefficient from that of the first group III nitride compound semiconductor on the first semiconductor film; and (c) cooling the substrate and separating the second semiconductor film from the first semiconductor film. Thus, a large-area group III nitride compound semiconductor substrate can be produced in high yields and with high reproducibility.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: August 14, 2001
    Assignee: Matsushita Electronics Corporation
    Inventors: Masaaki Yuri, Osamu Imafuji, Shinji Nakamura, Masahiro Ishida, Kenji Orita
  • Patent number: 6150674
    Abstract: A semiconductor device includes a substrate formed of Al.sub.x Ga.sub.1-x N (0<x<1) and a first semiconductor layer provided on the substrate and formed of a III-group nitride semiconductor containing Al. The difference between an Al ratio of the substrate and an Al ratio of the first semiconductor layer is less than about 0.15.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: November 21, 2000
    Assignee: Matsushita Electronics Corporation
    Inventors: Masaaki Yuri, Osamu Imafuji, Shinji Nakamura, Kenji Orita
  • Patent number: 6069394
    Abstract: A sapphire substrate, a buffer layer of undoped GaN and a compound semiconductor crystal layer successively formed on the sapphire substrate together form a substrate of a light emitting diode. A first cladding layer of n-type GaN, an active layer of undoped In.sub.0.2 Ga.sub.0.8 N and a second cladding layer successively formed on the compound semiconductor crystal layer together form a device structure of the light emitting diode. On the second cladding layer, a p-type electrode is formed, and on the first cladding layer, an n-type electrode is formed. In a part of the sapphire substrate opposing the p-type electrode, a recess having a trapezoidal section is formed, so that the thickness of an upper portion of the sapphire substrate above the recess can be substantially equal to or smaller than the thickness of the compound semiconductor crystal layer.
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: May 30, 2000
    Assignee: Matsushita Electronics Corporation
    Inventors: Tadao Hashimoto, Osamu Imafuji, Masaaki Yuri, Masahiro Ishida