Abstract: A one-chip flash-memory device includes a flash-memory array, a communications unit for analyzing a serial signal applied to the communications unit and for resolving the serial signal into an address, a command, and data in parallel with each other, and a control unit for controlling rewriting, erasing, and reading operations of the flash-memory array in accordance with the address, the command, and the data of the serial signal received by the communications unit. Rewriting and erasing operations may be performed without dismounting the flash-memory from a circuit board. In addition, the area of the circuit board on which the flash-memory is mounted is advantageously reduced.

Abstract: A head shutter is mounted on casing of a magnetic disk cartridge to openably cover a head insertion opening, and a spindle shutter is mounted on the cartridge casing to openably cover a spindle insertion opening. A shutter operating member is mounted on the cartridge casing, and is operable from the outside of the cartridge casing. When the insertion openings are closed, the shutter operating member is engaged with the head shutter and the spindle shutter to hold them against their opening movements, and when the insertion openings are to be opened, the shutter operating member is disengaged from the spindle shutter, and also acts on the head shutter to open the head shutter. A shutter opening-closing mechanism is provided in a disk drive unit, and includes a first shutter opening member for operating the shutter operating member, and a second shutter opening member for moving the head shutter from its half-opened position to its fully-opened position.

Abstract: A semiconductor memory device includes an array of memory cells arranged in rows and columns; a plurality of word lines connected to the rows of the memory cells; a plurality of bit lines connected to the columns of the memory cells; word line selection means; bit line selection means; and equalizing means for equalizing the bit line to a desired voltage level in response to an address signal, and for terminating the equalization in response to change in a signal on a word line according to change in the address signal.