Abstract: The present invention is a digital-to-analog converter comprising: a core digital-to-analog converter which converts digital signal of first number of bits to analog signal, a generator of an addend whose duty corresponds to the digital signal of second number of bits, an adder which adds the addend as least significant bit to the digital signal of first number of bits and supplies its output to the core digital-to-analog converter, and a filter which is supplied with its input from the core digital-to-analog converter and eliminates the ripples of the input to provide a ripple-eliminated analog signal at its output terminal, whereby the digital-to-analog converter can converts a digital signal of number of bits which exceed the first number, more exactly is the sum of the first number and the second number, to an analog signal.

Abstract: An interruption control apparatus includes registers storing priority data and a circuit producing scanning data in a priority order. The priority data is compared with the scanning data by a scanning operation. If the priority data is equal to the scanning data, a coincidence signal is generated. An interruption request signal from an interruption source is transferred to an interruption processing unit only when the coincidence signal is being generated. Thus, a priority control for a plurality of interruption requests can be performed by using a simple hardware circuit without complex software processing.