Patents by Inventor Osamu KARIKOME

Osamu KARIKOME has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230361220
    Abstract: The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.
    Type: Application
    Filed: July 5, 2023
    Publication date: November 9, 2023
    Inventors: Yohei YAMAGUCHI, Kazufumi WATABE, Tomoyuki ARIYOSHI, Osamu KARIKOME, Ryohei TAKAYA
  • Patent number: 11742430
    Abstract: The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: August 29, 2023
    Assignee: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Kazufumi Watabe, Tomoyuki Ariyoshi, Osamu Karikome, Ryohei Takaya
  • Publication number: 20230010077
    Abstract: A method of manufacturing a semiconductor device includes: forming a base oxide film on a surface of a silicon semiconductor substrate (P-type well region); forming a thick film portion provided along a boundary C between an activation region A and an element isolation region B and having at least a predetermined width W from the boundary C toward the element isolation region B and a thin film portion having a film thickness smaller than a film thickness ta of the thick film portion in the activation region A and the element isolation region B other than the thick film portion on the base oxide film; forming a silicon nitride film on surfaces of the thick film portion and the thin film portion; and selectively removing the silicon nitride film in the element isolation region B through an over-etching process.
    Type: Application
    Filed: May 26, 2022
    Publication date: January 12, 2023
    Inventors: Riki NAGASAWA, Hiroaki TAKASU, Osamu KARIKOME
  • Publication number: 20210305434
    Abstract: The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.
    Type: Application
    Filed: June 15, 2021
    Publication date: September 30, 2021
    Inventors: Yohei YAMAGUCHI, Kazufumi WATABE, Tmoyuki ARIYOSHI, Osamu KARIKOME, Ryohei TAKAYA
  • Patent number: 11063154
    Abstract: The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: July 13, 2021
    Assignee: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Kazufumi Watabe, Tomoyuki Ariyoshi, Osamu Karikome, Ryohei Takaya
  • Publication number: 20180026138
    Abstract: The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.
    Type: Application
    Filed: July 13, 2017
    Publication date: January 25, 2018
    Inventors: Yohei YAMAGUCHI, Kazufumi Watabe, Tomoyuki Ariyoshi, Osamu Karikome, Ryohei Takaya
  • Patent number: 9099359
    Abstract: A display device includes an electrode layer formed at a predetermined position on a substrate, an insulating film having a through-hole formed on the top of the electrode layer, and a wiring film connected to the electrode layer via the through-hole formed in the insulating film. Based on a surface of the substrate, the through-hole includes a first taper portion having a first taper angle, a second taper portion formed higher than the first taper portion and having a second taper angle different from the first taper angle, and a third taper portion formed higher than the second taper portion and having a third taper angle different from the second taper angle.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: August 4, 2015
    Assignee: JAPAN DISPLAY INC.
    Inventors: Miyo Ishii, Manabu Yamashita, Osamu Karikome
  • Patent number: 8970940
    Abstract: The MEMS shutter includes a shutter having an aperture part, a first spring connected to the shutter, a first anchor connected to the first spring, a second spring and a second anchor connected to the second spring, an insulation film on a surface of the shutter, the first spring, the second spring, the first anchor and the second anchor, the surfaces being in a perpendicular direction to a surface of a substrate, and the insulation film is not present on a surface of the plurality of terminals, and a surface of the shutter, the first spring, the second spring, the first anchor and the second anchor, the surfaces being in a parallel direction to a surface of the substrate and on the opposite side of the side facing the substrate.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: March 3, 2015
    Assignee: Pixtronix, Inc.
    Inventors: Takuo Kaitoh, Takeshi Kuriyagawa, Ryou Sakata, Osamu Karikome, Timothy J. Brosnihan
  • Publication number: 20130032832
    Abstract: A display device includes an electrode layer formed at a predetermined position on a substrate, an insulating film having a through-hole formed on the top of the electrode layer, and a wiring film connected to the electrode layer via the through-hole formed in the insulating film. Based on a surface of the substrate, the through-hole includes a first taper portion having a first taper angle, a second taper portion formed higher than the first taper portion and having a second taper angle different from the first taper angle, and a third taper portion formed higher than the second taper portion and having a third taper angle different from the second taper angle.
    Type: Application
    Filed: July 31, 2012
    Publication date: February 7, 2013
    Inventors: Miyo ISHII, Manabu YAMASHITA, Osamu KARIKOME
  • Publication number: 20120326179
    Abstract: The MEMS shutter includes a shutter having an aperture part, a first spring connected to the shutter, a first anchor connected to the first spring, a second spring and a second anchor connected to the second spring, an insulation film on a surface of the shutter, the first spring, the second spring, the first anchor and the second anchor, the surfaces being in a perpendicular direction to a surface of a substrate, and the insulation film is not present on a surface of the plurality of terminals, and a surface of the shutter, the first spring, the second spring, the first anchor and the second anchor, the surfaces being in a parallel direction to a surface of the substrate and on the opposite side of the side facing the substrate.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 27, 2012
    Inventors: Takuo KAITOH, Takeshi KURIYAGAWA, Ryou SAKATA, Osamu KARIKOME, Timothy J. BROSNIHAN