Abstract: A switching regulator includes: switching transistors configured to perform switching according to a control signal; an inductor connected to the switching transistors; a control mode switch unit configured to switch between a first control mode and a second control mode based on a direction in which a current flows through the inductor; an amplifier configured to operate as an error amplifier or a comparator; and a phase compensation unit connected to the amplifier by a switch unit, wherein, in the first control mode, the control mode switch unit connects the amplifier and the phase compensation unit by turning on the switch unit so as to cause the amplifier to operate as the error amplifier, and in the second control mode, the control mode switch unit turns off the switch unit so as to cause the amplifier to operate as the comparator.

Abstract: A reverse current preventing circuit of an N channel type switching MOS transistor connected between a voltage input terminal and an output terminal to control a conduction state between the voltage input terminal and the output terminal, the circuit comprises: a first MOS transistor connected between a substrate of the switching MOS transistor and a ground point; and a second MOS transistor connected between the substrate of the switching MOS transistor and a point having a piece of predetermined constant potential higher than that of the ground point, wherein the piece of predetermined constant potential higher than that of the ground point is applied to the substrate of the switching MOS transistor while the switching MOS transistor is made to be in its on-state, and ground potential is applied to the substrate of the switching MOS transistor while the switching MOS transistor is made to be in its off-state.

Abstract: A switching regulator includes: switching transistors configured to perform switching according to a control signal; an inductor connected to the switching transistors; a control mode switch unit configured to switch between a first control mode and a second control mode based on a direction in which a current flows through the inductor; an amplifier configured to operate as an error amplifier or a comparator; and a phase compensation unit connected to the amplifier by a switch unit, wherein, in the first control mode, the control mode switch unit connects the amplifier and the phase compensation unit by turning on the switch unit so as to cause the amplifier to operate as the error amplifier, and in the second control mode, the control mode switch unit turns off the switch unit so as to cause the amplifier to operate as the comparator.

Abstract: A reverse current preventing circuit of an N channel type switching MOS transistor connected between a voltage input terminal and an output terminal to control a conduction state between the voltage input terminal and the output terminal, the circuit comprises: a first MOS transistor connected between a substrate of the switching MOS transistor and a ground point; and a second MOS transistor connected between the substrate of the switching MOS transistor and a point having a piece of predetermined constant potential higher than that of the ground point, wherein the piece of predetermined constant potential higher than that of the ground point is applied to the substrate of the switching MOS transistor while the switching MOS transistor is made to be in its on-state, and ground potential is applied to the substrate of the switching MOS transistor while the switching MOS transistor is made to be in its off-state.

Abstract: Disclosed a switching control circuit including: a first drive circuit to generate a drive signal for driving a driving switching element to flow current through an inductor for voltage conversion into on/off states; wherein the first drive circuit generates the drive signal so that a transition time of the drive signal in which the driving switching element shifts from an off state to an on state becomes longer than a transition time of the drive signal in which the driving switching element shifts from the on state to the off state.

Abstract: A disclosed semiconductor device includes a first power terminal to which a high voltage is applied; a clamping circuit electrically connected to the first power terminal; and an internal circuit electrically connected to the clamping circuit and driven by a voltage lower than the high voltage. The clamping circuit includes a bipolar transistor. The emitter of the bipolar transistor is electrically connected to the first power terminal. The collector of the bipolar transistor is grounded. The base of the bipolar transistor is electrically connected to the collector of the bipolar transistor.

Abstract: A disclosed logic gate including a CMOS circuit having a p-channel MOS transistor and an n-channel MOS transistor and also includes a resistance device connected in series with a source or a drain of at least one of the p-channel MOS transistor and the n-channel MOS transistor, a switching device connected in parallel with the resistance device and configured to switch on and off, and a switching control circuit configured to control the switching on and off of the switching device according to an output signal output from the CMOS circuit.

Abstract: A protection circuit is disclosed that issues an instruction to blow a fuse connected to a power source in response to detection of an abnormality of a voltage of the power source. The protection circuit includes a time control unit that detects the voltage of the power source and controls the length of time from the detection of the abnormality of the voltage of the power source to the issue of the instruction to blow the fuse in accordance with the detected voltage.

Abstract: In a secondary battery protection circuit (200) for protecting a secondary battery (300) by controlling, by turning a discharge control switch (FET1) on and off, a discharging current (l) flowing from the secondary battery (300) through a load (400) connected between a pair of external connection terminals (101, 102), a clamping circuit (210) clamps a control terminal (G1) of the discharge control switch (FET1) into a ground potential when the external connection terminals (101, 102) are short-circuited.

Abstract: In a secondary battery protection circuit (200) for protecting a secondary battery (300) by controlling, by turning a discharge control switch (FET1) on and off, a discharging current (I) flowing from the secondary battery (300) through a load (400) connected between a pair of external connection terminals (101, 102), a clamping circuit (210) clamps a control terminal (G1) of the discharge control switch (FET1) into a ground potential when the external connection terminals (101, 102) are short-circuited.