Abstract: A D/A converter for receiving a plurality of divisional voltages and converting a digital signal to an analog voltage with the divisional voltages, the D/A converter includes a selection circuit for receiving the divisional voltages and the digital signal to select one of the divisional voltages. The selection circuit includes a plurality of first switch circuits that are selectively activated in response to the digital signal to select one of the divisional voltages, with each of the first switch circuits being provided with a logic switch function and having an ON resistance when activated, and at least an activated one of the first switch circuits further dividing the selected one of the divisional voltages with the ON resistance. The plurality of switch circuits includes at least one voltage dividing switch circuit used to further divide the selected one of the divisional voltages.

Abstract: A driver IC for a display that includes a first D/A converter with a 1st selection circuit that receives 1st image signals and supplies a selected positive divisional voltage to a 1st operational amplifier, which supplies a positive pixel voltage by amplifying the selected positive divisional voltage; a 2nd D/A converter with a 2nd selection circuit that receives 2nd image signals and supplies a selected negative divisional voltage to a 2nd operational amplifier, which supplies a negative pixel voltage by amplifying the selected negative divisional voltage; and a polarity switching switch with 1st and 2nd switches connecting the 1st and 2nd D/A converters respectively, the polarity switching switch being switched to supply each of output terminals corresponding to the 1st and 2nd image signals alternately with the positive and negative pixel voltages every horizontal scan period by activating/inactivating the 1st and 2nd switches in a complementary manner.

Abstract: A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.

Abstract: A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.

Abstract: A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.

Abstract: A bias circuit generates a first voltage at a first node. A second current source generates, according to the first voltage, a power supply current to be supplied to an internal circuit including transistors. A correcting transistor in a correcting circuit supplies the first node with a correcting current generated according to a constant voltage. Because of this, the first voltage is adjusted according to the correcting current. Therefore, the operating speed of the internal circuit is prevented from changing, being dependent on the variation of the threshold voltage and temperature variation of a transistor. As a result, the yield can be improved, independently of the variation of the threshold voltage among semiconductor integrated circuit chips, which occurs in a fabrication process. Further, temperature dependency of the operating speed of the internal circuit can be reduced, which can improve the yield of the semiconductor integrated circuit.

Abstract: The present invention provides a data driver on which an operation test can be easily and reliably conducted at the stage of manufacture and for which the testing time can be reduced and a display utilizing the same. A select switch portion 60 is provided for electrically connecting and disconnecting a ladder resistor portion 56 and selector portions 58. At the ends of wiring of grayscale voltage lines l1 through l64 opposite to the ladder resistor portion 56, there is provided a state setting circuit 62 which sets each of the grayscale lines l1 through l64 at a “High” level or a “Low” level or which sets the ends of the grayscale voltage lines l1 through l64 in a high impedance state. The state setting circuit 62 is further connected to a testing control portion 64 incorporating a shift register which operates in synchronism with a test clock TST-CLK.

Abstract: A bias circuit generates a first voltage at a first node. A second current source generates, according to the first voltage, a power supply current to be supplied to an internal circuit including transistors. A correcting transistor in a correcting circuit supplies the first node with a correcting current generated according to a constant voltage. Because of this, the first voltage is adjusted according to the correcting current. Therefore, the operating speed of the internal circuit is prevented from changing, being dependent on the variation of the threshold voltage and temperature variation of a transistor. As a result, the yield can be improved, independently of the variation of the threshold voltage among semiconductor integrated circuit chips, which occurs in a fabrication process. Further, temperature dependency of the operating speed of the internal circuit can be reduced, which can improve the yield of the semiconductor integrated circuit.

Abstract: In the LCD panel driving circuit, the voltage of first and second buffer amplifiers is supplied to first output pad, the voltage of second and third buffer amplifiers is supplied to second output pad, and voltage of third and fourth buffer amplifiers is supplied to third output pad. Thus, data-line selection switches and output-polarity selection switches are switched in such a way that the voltage supplied to any adjacent output pads is always supplied from adjacent buffer amplifiers.

Abstract: A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.

Abstract: The present invention provides a data driver on which an operation test can be easily and reliably conducted at the stage of manufacture and for which the testing time can be reduced and a display utilizing the same. A select switch portion 60 is provided for electrically connecting and disconnecting a ladder resistor portion 56 and selector portions 58. At the ends of wiring of grayscale voltage lines l1 through l64 opposite to the ladder resistor portion 56, there is provided a state setting circuit 62 which sets each of the grayscale lines l1 through l64 at a “High” level or a “Low” level or which sets the ends of the grayscale voltage lines l1 through l64 in a high impedance state. The state setting circuit 62 is further connected to a testing control portion 64 incorporating a shift register which operates in synchronism with a test clock TST-CLK.

Abstract: A hardness tester for a large test material is downsized by shortening a stroke length of the x-y stage. A hardness tester in accordance with the invention transfers the laser irradiating unit 70 two-dimensionally along the X or Y axis and irradiate a laser beam on the material W under test placed on the stage 10. The tester also monitors the laser beam visually and determine a target position to be measured and transfers the monitoring unit 45 to the determined target position along the X or Y axis and monitor the position by means of the monitoring unit 45. If the position does not fall on a boundary between crystals, the loading unit 55 is two-dimensionally transferred and forms a dent on the position by means of the penetrator 55a. An image of the dent is captured by the monitoring unit 45 and the hardness is determined by calculating a diagonal length of the dent by image processing.

Abstract: A semiconductor device including a plurality of chip units each defined by a side wall and arranged in a state such that a side wall of a chip unit abuts a corresponding side wall of an adjacent chip unit, and an interconnection structure for interconnecting a plurality of terminals of a side wall of a chip unit to corresponding terminals of a side wall of an adjacent chip unit that abuts the chip unit at the respective side walls.

Abstract: A semiconductor device including a plurality of chip units each defined by a side wall and arranged in a state such that a side wall of a chip unit abuts a corresponding side wall of an adjacent chip unit, and an interconnection structure for interconnecting a plurality of terminals of a side wall of a chip unit to corresponding terminals of a side wall of an adjacent chip unit that abuts the chip unit at the respective side walls.

Abstract: A combustion controller for a two-cycle engine which enables to cause self firing always at the optimum timing is provided. The combustion controller comprises an exhaust control valve 15 provided in the vicinity of an exhaust port 7 of the two-cycle engine 1 and capable of fully closing the exhaust port and driving control means 47, 38, 39, 40 and 37 to drive the exhaust control valve 15 according to a control map giving an exhaust opening ratio .theta..sub.e depending at least on the engine speed and the throttle valve opening ratio .theta..sub.th in order to control the pressure in the cylinder during up-stroke of the piston 8.

Abstract: Disclosed is an improved laminated metallic belt consisting of at least two layers of an endless metallic band for use in a torque transmission device, which can transmit torque between two pulleys having variable effective radii, in combination with a plurality of metallic blocks which have surfaces contacting the innermost layer of the laminated metallic belt and are arranged along the laminated metallic belt. The metallic belt according to the present invention may be made of precipitation hardening martensitic stainless steel or maraging steel which have favorable properties as to toughness, mechanical strength and the adaptability for welding required for making an endless laminated metallic belt, but lack the surface hardness to ensure relatively favorable durability. The durability of the steel is improved according to the present invention by a nitride layer and/or an electroless nickel plating layer formed on the side edges of the endless metallic band.

Abstract: A differential amplifier, which is associated with a digital-to-analog converter and a register and serves as an element of an analog-to-digital converter, having the offset input voltage characteristic determined by selecting, for example, the ratio of the emitter areas of a first pair of transistors so that no offset characteristic is required for the digital-to-analog converter associated with the differential amplifier. The offset input voltage can also be determined by selecting the ratio of the emitter areas of a second pair of transistors each one of the second pair of transistors connected to a different one of the first transistors and each one of the second pair of transistors having a current source of the same magnitude. The offset characteristic can also be determined by selecting unequal magnitudes of the current sources connected to the second pair of transistors when the ratio of the second pair of transistor emitter areas are equal.

Abstract: A diffused resistor for an integrated circuit comprising two resistor portions. Each of the resistor portions comprises a semiconductor substrate of a first conductivity type, an isolated epitaxial region of a second conductivity type, a diffused region (i.e. a resistance layer) of the first conductivity type, a contacting region of the second conductivity type and terminals. An end portion of the resistance layer in one of the resistor portions is connected to one of the ends of the resistance layer in the other resistor portion so that these resistance layers combine to form a resistor. In the other resistor portion the other end portion of the resistance layer is connected to the contacting region. Depletion layers generated in the resistor portions vary so as to maintain the resistance of the diffused resistor constant.