Patents by Inventor Osamu Nanba

Osamu Nanba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050112818
    Abstract: A first insulating layer is formed on semiconductor substrate, and a trench is formed in the first insulating layer. An amorphous silicon layer doped with impurities is formed on a side and bottom walls of the trench. Next, a resist material is partially filled in the trench so that an upper portion of the amorphous silicon layer is exposed. The exposed portion is implanted with impurity ions. After removal of the resist material, the amorphous silicon layer is heat treated so as to grow hemispherical grains on its surface.
    Type: Application
    Filed: October 27, 2004
    Publication date: May 26, 2005
    Inventors: Yoshiki Nagatomo, Shoji Yo, Osamu Nanba, Hiroaki Uchida, Kazuya Suzuki
  • Patent number: 6828207
    Abstract: A first insulating layer is formed on semiconductor substrate, and a trench is formed in the first insulating layer. An amorphous silicon layer doped with impurities is formed on a side and bottom walls of the trench. Next, a resist material is partially filled in the trench so that an upper portion of the amorphous silicon layer is exposed. The exposed portion is implanted with impurity ions. After removal of the resist material, the amorphous silicon layer is heat treated so as to grow hemispherical grains on its surface.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: December 7, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Yoshiki Nagatomo, Shoji Yo, Osamu Nanba, Hiroaki Uchida, Kazuya Suzuki
  • Publication number: 20030186510
    Abstract: The invention includes a process for the fabrication of semiconductor device, comprising the steps of forming a trench in the interlayer of semiconductor substrate, depositing impurities doped a amorphous silicon served as a lower electrode all over the trench, forming a resist so as to expose the top portion of the amorphous silicon in the trench, etching the amorphous silicon layer except for the trench, implanting impurities into the top portion of the amorphous silicon and growing HSG silicon by means of heat treatment after resist strip.
    Type: Application
    Filed: January 29, 2003
    Publication date: October 2, 2003
    Inventors: Yoshiki Nagatomo, Shoji Yo, Osamu Nanba, Hiroaki Uchida, Kazuya Suzuki
  • Patent number: 6623996
    Abstract: A semiconductor device in which an integrated circuit is formed includes a resistance-measurement area with conductive members disposed in at least two different layers, and an electrode pattern. The electrode pattern includes contact plugs that, depending on their alignment, make electrical contact with different conductive members. Contact alignment error is measured by measuring the electrical resistance between a pair of electrodes in the electrode pattern.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: September 23, 2003
    Assignee: Oki Electric Industry Co, Ltd.
    Inventor: Osamu Nanba
  • Publication number: 20030030456
    Abstract: A semiconductor device in which an integrated circuit is formed includes a resistance-measurement area with conductive members disposed in at least two different layers, and an electrode pattern. The electrode pattern includes contact plugs that, depending on their alignment, make electrical contact with different conductive members. Contact alignment error is measured by measuring the electrical resistance between a pair of electrodes in the electrode pattern.
    Type: Application
    Filed: October 4, 2002
    Publication date: February 13, 2003
    Inventor: Osamu Nanba
  • Patent number: 6518606
    Abstract: A semiconductor device in which an integrated circuit is formed includes a resistance-measurement area with conductive members disposed in at least two different layers, and an electrode pattern. The electrode pattern includes contact plugs that, depending on their alignment, make electrical contact with different conductive members. Contact alignment error is measured by measuring the electrical resistance between a pair of electrodes in the electrode pattern.
    Type: Grant
    Filed: February 15, 2000
    Date of Patent: February 11, 2003
    Assignee: Oki Electric Industry Co, Ltd.
    Inventor: Osamu Nanba
  • Patent number: 5344739
    Abstract: A photosensitive diazo resin-containing photosensitive resin composition for lithographic printing comprising a sensitizing dye having an anion group in a molecule as a counter ion of a diazonium group.
    Type: Grant
    Filed: November 2, 1992
    Date of Patent: September 6, 1994
    Assignee: Nippon Paint Co., Ltd.
    Inventors: Kazunori Kanda, Osamu Nanba, Edward Lam
  • Patent number: 5308735
    Abstract: Disclosed is a photosensitive diazo resin for lithographic printing represented by the formula: ##STR1## wherein X.sup.- is a counter anion, Y is a divalent bonding group selected from the group consisting of --NH--, --S-- and --O--, R.sub.1, R.sub.2 and R.sub.3 are groups which are independently selected from the group consisting of hydrogen, an alkyl group and an alkoxy group, R.sub.4 and R.sub.5 are groups which are independently selected from the group consisting of hydrogen, an alkyl group and a phenyl group, 1 and m are integers which satisfy the relation:1+m=2 to 100, 1/m=30 to 99/1 to 70and A is a quaternary ammonium salt-containing group represented by the formula: ##STR2## (wherein B is a straight or branched divalent C.sub.1-10 alkyl group which bonds to an aromatic ring by a group selected from the group consisting of --CH.sub.2 --, --CO--, --O--, --S-- and --N--, and R.sub.6, R.sub.7 and R.sub.8 are groups which are independently selected from the group consisting of hydrogen and a C.sub.
    Type: Grant
    Filed: October 29, 1992
    Date of Patent: May 3, 1994
    Assignee: Nippon Paint Co., Ltd.
    Inventors: Kazunori Kanda, Edward Lam, Osamu Nanba
  • Patent number: 5221589
    Abstract: Disclosed is a photosensitive resin composition which, can be hot melt molding and and is water-developable. The composition does not need the preliminary exposure process and when cured has suitable hardness and printing properties. The photosensitive resin composition comprises;(A) a water soluble or water dispersible polyvinyl alcohol prepared by saponifying a copolymer obtained by copolymerizing 90 to 99.9 mol % of a vinyl ester and 0.1 to 10 mol % of an ionic group-containing monomer; said polyvinyl alcohol having a saponification degree of the vinyl ester unit of 60 to 75 mol % and a hot melt flow starting temperature of 95.degree. to 170.degree. C.,(B) a polymerizable compound prepared by reacting in the presence of an acid catalyst, (i) N-methylol (meth)acrylamide or N-alkoxymethyl (meth)acrylamide and (ii) a compound selected from the group consisting of monoalcohols, polyhydric alcohols, amides, haloalkylamides, aromatic compounds, ureas and mixtures thereof, and(C) a photopolymerization initiator.
    Type: Grant
    Filed: April 3, 1991
    Date of Patent: June 22, 1993
    Assignee: Nippon Paint Co., Ltd.
    Inventors: Osamu Nanba, Chitoshi Kawaguchi, Seiji Arimatsu, Kazunori Kanda
  • Patent number: D722532
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: February 17, 2015
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Osamu Nanba, Lorenz Bittner, Syuji Ozawa
  • Patent number: D732428
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: June 23, 2015
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Osamu Nanba, Atsushi Kochi, Sou Tamiya