Patents by Inventor Osamu Sasaki

Osamu Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240122988
    Abstract: The present invention relates to a synapse formation promoter and a brain plasticity promoter comprising CD24-negative mesenchymal stem cells prepared from a patient's own bone marrow aspirate and treatment of dementia, chronic-phase cerebral infarction, chronic-phase spinal cord injury, mental diseases, and the like using the synapse formation promoter and brain plasticity promoter.
    Type: Application
    Filed: April 26, 2023
    Publication date: April 18, 2024
    Applicants: Sapporo Medical University, Nipro Corporation
    Inventors: Osamu Honmou, Masanori Sasaki, Rie Maezawa, Shinichi Oka, Yuko Sasaki, Masahito Nakazaki, Toshihiko Yamashita
  • Patent number: 11928276
    Abstract: A plurality of gate bus lines are scanned one by one such that a video signal is written, via a corresponding source bus line, into each of pixel forming sections provided in a plurality of rows and a plurality of columns. When a sensor electrode is driven to detect a touch position, the scanning of the gate bus lines is stopped. Operation of a gate driver and operation of a touch sensor drive circuit are controlled such that, when the sensor electrode is driven, a stop row that is a row at which the scanning of the gate bus lines is stopped is different in each of a first frame period and a second frame period that are two consecutive frame periods.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: March 12, 2024
    Assignee: Sharp Display Technology Corporation
    Inventor: Osamu Sasaki
  • Publication number: 20240068380
    Abstract: There is provided a pit initiation evaluation system or the like capable of predicting pit initiation effectively and at low cost. In a pit initiation evaluation system of an embodiment, a pit initiation evaluation unit creates and retains, based on a dry-wet alternate time data, a deposit impurity concentration data, and a pit initiation data on pitting corrosion initiated in each of a plurality of turbine stages when an operation is actually performed in the steam turbine, a pit initiation evaluation table presenting a relationship between a dry-wet alternate time, a deposit impurity concentration, and pit initiation. Further, the pit initiation evaluation unit is configured to evaluate, by using the pit initiation evaluation table, pitting corrosion to be initiated in each of the plurality of turbine stages in an operation planned for the steam turbine.
    Type: Application
    Filed: November 2, 2022
    Publication date: February 29, 2024
    Applicant: TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Yuka TSUKADA, Kazuhiro SAITO, Yusuke SUZUKI, Yoshikazu NINOMIYA, Osamu TANAKA, Yasuteru KAWAI, Shinichi TERADA, Makoto SASAKI
  • Patent number: 11776500
    Abstract: Multiple adjustment capacitors corresponding to multiple source bus lines on a one-to-one correspondence basis are arranged. Each adjustment capacitor includes a first electrode supplied with an adjustment signal and a second electrode connected to the source bus line. The adjustment capacitors are divided into multiple groups. An adjustment signal having a amplitude different from group to group is supplied to the adjustment capacitor. A potential of the adjustment signal is raised after a liquid-crystal capacitor is charged in a pixel formation region including a thin-film transistor (TFT) that is turned on with a gate driver causing a scanning signal to rise and before the gate driver causes the scanning signal to fall.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: October 3, 2023
    Assignee: SHARP DISPLAY TECHNOLOGY CORPORATION
    Inventor: Osamu Sasaki
  • Publication number: 20230229249
    Abstract: A plurality of gate bus lines are scanned one by one such that a video signal is written, via a corresponding source bus line, into each of pixel forming sections provided in a plurality of rows and a plurality of columns. When a sensor electrode is driven to detect a touch position, the scanning of the gate bus lines is stopped. Operation of a gate driver and operation of a touch sensor drive circuit are controlled such that, when the sensor electrode is driven, a stop row that is a row at which the scanning of the gate bus lines is stopped is different in each of a first frame period and a second frame period that are two consecutive frame periods.
    Type: Application
    Filed: January 4, 2023
    Publication date: July 20, 2023
    Inventor: Osamu SASAKI
  • Publication number: 20230105542
    Abstract: Multiple adjustment capacitors corresponding to multiple source bus lines on a one-to-one correspondence basis are arranged. Each adjustment capacitor includes a first electrode supplied with an adjustment signal and a second electrode connected to the source bus line. The adjustment capacitors are divided into multiple groups. An adjustment signal having a amplitude different from group to group is supplied to the adjustment capacitor. A potential of the adjustment signal is raised after a liquid-crystal capacitor is charged in a pixel formation region including a thin-film transistor (TFT) that is turned on with a gate driver causing a scanning signal to rise and before the gate driver causes the scanning signal to fall.
    Type: Application
    Filed: September 2, 2022
    Publication date: April 6, 2023
    Inventor: Osamu SASAKI
  • Patent number: 11492266
    Abstract: Provided herein are processes for producing positive electrode active substance particles for non-aqueous electrolyte secondary batteries which is excellent in life characteristics of a battery with respect to a repeated charging and discharging performance thereof, as well as a non-aqueous electrolyte secondary battery. In particular, provided herein are processes for producing a positive electrode active substance for non-aqueous electrolyte secondary batteries comprising lithium transition metal layered oxide having a composition represented by the formula: Lia(NixCoyMn1-x-y)O2 wherein a is 1.0?a?1.15; x is 0<x<1; and y is 0<y<1, in which the positive electrode active substance is in the form of secondary particles formed by aggregating primary particles thereof, and a coefficient of variation of a compositional ratio: Li/Me wherein Me is a sum of Ni, Co and Mn as measured on a section of the secondary particle is not more than 25%.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: November 8, 2022
    Assignee: TODA KOGYO CORP.
    Inventors: Akihisa Kajiyama, Ryuta Masaki, Tsuyoshi Wakiyama, Tetsuya Kashima, Shoichi Fujino, Osamu Sasaki, Kazutoshi Matsumoto
  • Patent number: 11189685
    Abstract: Provided is a resistance element, including: a semiconductor substrate; a first insulating film stacked on the semiconductor substrate; a resistance layer selectively stacked on the first insulating film; a first auxiliary film separated from the resistance layer; a second auxiliary film separated from the resistance layer in a direction different from that of the first auxiliary film; a second insulating film stacked on the first insulating film to cover the resistance layer, and the first auxiliary film and the second auxiliary film; a first electrode connected to the resistance layer and stacked on the second insulating film disposed on an upper side of the first auxiliary film; and a second electrode connected to the resistance layer by being separated from the first electrode and stacked on the second insulating film on the upper side of the second auxiliary film.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: November 30, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Masaru Saito, Masaharu Yamaji, Osamu Sasaki, Hitoshi Sumida
  • Patent number: 11114351
    Abstract: A dummy element includes: a semiconductor substrate; a lower insulating film deposited on the semiconductor substrate; a first resistive layer deposited on the lower insulating film; an interlayer insulating film covering the first resistive layer; a first pad-forming electrode deposited on the interlayer insulating film so as to be connected to the first resistive layer, and including an extending portion to be in Schottky contact with the semiconductor substrate; a relay wire connected to the first resistive layer and connected to the semiconductor substrate with an ohmic contact; and a counter electrode allocated under the semiconductor substrate, the dummy element simulating a defective state in the lower insulating film and the interlayer insulating film immediately under the first pad-forming electrode included in a corresponding resistive element as a target to be examined.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: September 7, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Osamu Sasaki, Masaru Saito, Taichi Karino
  • Publication number: 20210241710
    Abstract: A liquid crystal display device includes a display section including scanning lines, data lines, and pixel circuits, a scanning line drive circuit, a data line drive circuit, a first voltage output circuit, and a second voltage output circuit. The pixel circuit includes a liquid crystal capacitance having a pixel electrode, and applies one of a first voltage and a second voltage to the pixel electrode of the liquid crystal capacitance, in accordance with data written by driving the scanning line and the data line. The first voltage output circuit controls the first voltage to have a level that is more distant from the second voltage than a normal level, in accordance with a timing when a voltage of the pixel electrode changes. With this, a reflective type liquid crystal display device performing binary display and capable of preventing an afterimage caused by an orientation abnormality is provided.
    Type: Application
    Filed: December 2, 2020
    Publication date: August 5, 2021
    Inventor: OSAMU SASAKI
  • Patent number: 11078086
    Abstract: The object of the present invention is to improve production efficiency of lithium hydroxide anhydride in a method for producing lithium hydroxide anhydride from lithium hydroxide hydrate by using a rotary kiln. The method for producing lithium hydroxide anhydride comprises steps of: supplying the lithium hydroxide hydrate to a region between a heating part which is the part of the furnace core tube surrounded by the heating furnace and one end of the furnace core tube; delivering the supplied lithium hydroxide hydrate toward the other end of the furnace core tube; feeding a drying gas with a temperature of 100° C. or higher to the region between the one end and the heating part of the furnace core tube, when the lithium hydroxide hydrate is supplied; and heating and dehydrating the lithium hydroxide hydrate by the heating furnace which is set to 230-450° C. during the lithium hydroxide delivering step, to form lithium hydroxide anhydride.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: August 3, 2021
    Assignees: BASF TODA BATTERY MATERIALS LLC, TANABE CORPORATION
    Inventors: Manabu Yamamoto, Osamu Sasaki, Noriyasu Kimura, Kenichi Nishimura, Wataru Koyanagi, Toru Kuwahara
  • Patent number: 10727180
    Abstract: A resistive element includes: a semiconductor substrate; a first insulating film deposited on the semiconductor substrate; a resistive layer deposited on the first insulating film; a second insulating film deposited to cover the first insulating film and the resistive layer; a first electrode deposited on the second insulating film and electrically connected to the resistive layer; a relay wire deposited on the second insulating film without being in contact with the first electrode, and including a resistive-layer connection terminal electrically connected to the resistive layer and a substrate connection terminal connected to the semiconductor substrate with an ohmic contact; and a second electrode deposited on a bottom side of the semiconductor substrate, wherein a resistor is provided between the first electrode and the second electrode.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: July 28, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Taichi Karino, Hitoshi Sumida, Masaru Saito, Masaharu Yamaji, Osamu Sasaki
  • Patent number: 10725087
    Abstract: To provide a semiconductor integrated device capable of a gate screening test with no need for any additional circuit and without adding any gate screening terminal. The semiconductor integrated device includes a gate drive unit configured to drive the gate of a voltage controlled semiconductor element and a regulator configured to supply a gate drive voltage to the gate drive unit. The regulator includes an external connection terminal capable of receiving a gate screening voltage for the voltage controlled semiconductor element in a gate screening test.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: July 28, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Mori, Hitoshi Sumida, Masahiro Sasaki, Akira Nakamori, Masaru Saito, Wataru Tomita, Osamu Sasaki
  • Publication number: 20200055739
    Abstract: The object of the present invention is to improve production efficiency of lithium hydroxide anhydride in a method for producing lithium hydroxide anhydride from lithium hydroxide hydrate by using a rotary kiln. The method for producing lithium hydroxide anhydride comprises steps of: supplying the lithium hydroxide hydrate to a region between a heating part which is the part of the furnace core tube surrounded by the heating furnace and one end of the furnace core tube; delivering the supplied lithium hydroxide hydrate toward the other end of the furnace core tube; feeding a drying gas with a temperature of 100° C. or higher to the region between the one end and the heating part of the furnace core tube, when the lithium hydroxide hydrate is supplied; and heating and dehydrating the lithium hydroxide hydrate by the heating furnace which is set to 230-450° C. during the lithium hydroxide delivering step, to form lithium hydroxide anhydride.
    Type: Application
    Filed: October 31, 2017
    Publication date: February 20, 2020
    Applicants: BASF TODA BATTERY MATERIALS LLC, TANABE CORPORATION
    Inventors: Manabu YAMAMOTO, Osamu SASAKI, Noriyasu KIMURA, Kenichi NISHIMURA, Wataru KOYANAGI, Toru KUWAHARA
  • Publication number: 20200058934
    Abstract: Provided positive electrode active substance particles for non-aqueous electrolyte secondary batteries which is excellent in life characteristics of a battery with respect to a repeated charging and discharging performance thereof, as well as a non-aqueous electrolyte secondary battery. A positive electrode active substance for non-aqueous electrolyte secondary batteries comprising lithium transition metal layered oxide having a composition represented by the formula: Lia(NixCoyMn1-x-y)O2 wherein a is 1.0•a•1.15; x is 0<x<1; and y is 0<y<1, in which the positive electrode active substance is in the form of secondary particles formed by aggregating primary particles thereof, and a coefficient of variation of a compositional ratio: Li/Me wherein Me is a sum of Ni, Co and Mn (Me=Ni+Co+Mn) as measured on a section of the secondary particle is not more than 25%.
    Type: Application
    Filed: October 25, 2019
    Publication date: February 20, 2020
    Inventors: Akihisa KAJIYAMA, Ryuta MASAKI, Tsuyoshi WAKIYAMA, Tetsuya KASHIMA, Shoichi FUJINO, Osamu SASAKI, Kazutoshi MATSUMOTO
  • Publication number: 20200051874
    Abstract: A dummy element includes: a semiconductor substrate; a lower insulating film deposited on the semiconductor substrate; a first resistive layer deposited on the lower insulating film; an interlayer insulating film covering the first resistive layer; a first pad-forming electrode deposited on the interlayer insulating film so as to be connected to the first resistive layer, and including an extending portion to be in Schottky contact with the semiconductor substrate; a relay wire connected to the first resistive layer and connected to the semiconductor substrate with an ohmic contact; and a counter electrode allocated under the semiconductor substrate, the dummy element simulating a defective state in the lower insulating film and the interlayer insulating film immediately under the first pad-forming electrode included in a corresponding resistive element as a target to be examined.
    Type: Application
    Filed: June 27, 2019
    Publication date: February 13, 2020
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Osamu SASAKI, Masaru Saito, Taichi Karino
  • Publication number: 20200044011
    Abstract: Provided is a resistance element, including: a semiconductor substrate; a first insulating film stacked on the semiconductor substrate; a resistance layer selectively stacked on the first insulating film; a first auxiliary film separated from the resistance layer; a second auxiliary film separated from the resistance layer in a direction different from that of the first auxiliary film; a second insulating film stacked on the first insulating film to cover the resistance layer, and the first auxiliary film and the second auxiliary film; a first electrode connected to the resistance layer and stacked on the second insulating film disposed on an upper side of the first auxiliary film; and a second electrode connected to the resistance layer by being separated from the first electrode and stacked on the second insulating film on the upper side of the second auxiliary film.
    Type: Application
    Filed: June 27, 2019
    Publication date: February 6, 2020
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Masaru SAITO, Masaharu YAMAJI, Osamu SASAKI, Hitoshi SUMIDA
  • Patent number: 10482838
    Abstract: This application discloses an active-matrix display device capable of providing satisfactory display free from display irregularities on a non-rectangular display portion, such as a notched display portion, while avoiding an increased circuit scale and other adverse factors. In such an active-matrix liquid crystal display device including a notched display portion, pulses of gate clock signals GCK and GCKB corresponding to pulses of scanning signals are subjected to waveform rounding in accordance with time constants of scanning signal lines to which the scanning signals are to be applied. As a result, the waveforms of all scanning signals to be applied to the scanning signal lines are rounded to almost the same degree. Thus, each pixel forming portion is approximately equal in pixel voltage reduction amount ?Vp upon turning off of a pixel switching element.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: November 19, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Osamu Sasaki
  • Publication number: 20190197976
    Abstract: This application discloses an active-matrix display device capable of providing satisfactory display free from display irregularities on a non-rectangular display portion, such as a notched display portion, while avoiding an increased circuit scale and other adverse factors. In such an active-matrix liquid crystal display device including a notched display portion, pulses of gate clock signals GCK and GCKB corresponding to pulses of scanning signals are subjected to waveform rounding in accordance with time constants of scanning signal lines to which the scanning signals are to be applied. As a result, the waveforms of all scanning signals to be applied to the scanning signal lines are rounded to almost the same degree. Thus, each pixel forming portion is approximately equal in pixel voltage reduction amount ?Vp upon turning off of a pixel switching element.
    Type: Application
    Filed: December 6, 2018
    Publication date: June 27, 2019
    Inventor: Osamu SASAKI
  • Patent number: 10325254
    Abstract: The present invention provides an electronic wallet having a higher level of anonymity, security and convenience, which is capable of efficient electronizing of value information as well as which allows the user to efficiently manage the electronic value information. A presentation card indicating the fixed property of an electronic value is digitally signed by the service provider; a variable property is digitally signed with the private key of that electronic value. A service control, security information, representation control and representation resource are digitally signed by the service provider. These digital signature will be authenticated each time an electronic value object is generated.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: June 18, 2019
    Assignee: Sovereign Peak Ventures, LLC
    Inventors: Hisashi Takayama, Tetsuo Matsuse, Kyoko Kawaguchi, Yoshiaki Nakanishi, Osamu Sasaki