Abstract: A dither circuit for improving linearity in A/D or D/A conversion by adding dither to an input signal of an A/D or D/A converter and subtracting dither from an output signal of the A/D or D/A converter. The dither circuit comprises a dither generator for supplying dither to the input and output signals for addition and subtraction of the dither and dither level changing means for detecting the level of the input signal to the A/D or D/A converter for controlling the dither generator to change the level of dither supplied by the dither generator, in accordance with the level of the input signal. The level of dither is controlled to increase as the level of the input signal decreases and to decrease as the level of the input signal increases.