Patents by Inventor Osamu Tokuhiro

Osamu Tokuhiro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6548831
    Abstract: A liquid crystal display panel includes a gate line and a signal line intersecting the gate line at an intersection portion where the gate line and the signal line intersect each other. The gate line includes at least two conductive portions and at least one opening portion on the intersection portion. The at least one opening portion on the gate line is used for removing an etching stopper layer.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: April 15, 2003
    Assignee: International Business Machines Corporation
    Inventors: Osamu Tokuhiro, Hiroyuki Ueda
  • Patent number: 6525341
    Abstract: The present invention improves a productivity in growing an a-Si film in a thin film transistor and to obtain an excellent thin film transistor characteristic. More specifically, disclosed is a thin film transistor in which an amorphous silicon film 2, a gate insulating film 3 and a gate electrode are sequentially stacked on an insulating substrate 1. The amorphous silicon film 2 includes a low defect-density amorphous silicon layer 5 formed at a low deposition rate and a high deposition rate amorphous silicon layer 6 formed at a deposition rate higher than that of the low defect-density amorphous silicon layer 5. The low defect-density amorphous silicon layer 5 in the amorphous silicon film 2 is grown closer to the insulating substrate 1, and the high deposition rate amorphous silicon layer 6 is grown closer to the gate insulating film 3.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: February 25, 2003
    Assignee: International Business Machines Corporation
    Inventors: Takatoshi Tsujimura, Osamu Tokuhiro, Mitsuo Morooka, Takashi Miyamoto
  • Publication number: 20030013247
    Abstract: A method of manufacturing a liquid crystal panel comprises the steps of forming a gate insulating film, a channel layer and an etching stopper layer on a transparent substrate bearing a gate electrode, exposing the substrate to light from its back surface side by using the gate electrode as a light shielding mask by photolithography, developing the resist, etching the etching stopper layer, forming a source/drain layer, and etching the source/drain layer and a remaining part of the etching stopper by chemical gas phase etching.
    Type: Application
    Filed: September 4, 2002
    Publication date: January 16, 2003
    Applicant: International Business Machines Corporation
    Inventors: Osamu Tokuhiro, Hiroyuki Ueda, Masahiko Machida
  • Patent number: 6465285
    Abstract: A method of manufacturing a liquid crystal panel comprises the steps of forming a gate insulating film, a channel layer and an etching stopper layer on a transparent substrate bearing a gate electrode, exposing the substrate to light from its back surface side by using the gate electrode as a light shielding mask by photolithography, developing the resist, etching the etching stopper layer, forming a source/drain layer, and etching the source/drain layer and a remaining part of the etching stopper by chemical gas phase etching.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: October 15, 2002
    Assignees: International Business Machines Corporation, Kabushiki Kaisha Toshiba
    Inventors: Osamu Tokuhiro, Hiroyuki Ueda, Masahiko Machida
  • Publication number: 20020106839
    Abstract: A thin film transistor and method of making the same is disclosed in which a contact hole is formed with a flattened interface between openings in an inorganic material passivation layer and an organic material interlayer insulating film thereabove. The method includes etching an opening in the interlayer insulating film, using that opening as a mask for subsequently etching a self-aligned opening in the passivation layer, and again etching the interlayer insulating film in a develop back process to obtain a contact hole having a flattened inner sidewall.
    Type: Application
    Filed: January 31, 2002
    Publication date: August 8, 2002
    Applicant: International Business Machines Corporation
    Inventors: Takatoshi Tsujimura, Taroh Hasumi, Osamu Tokuhiro, Mitsuo Morooka
  • Publication number: 20020090769
    Abstract: A method of manufacturing a liquid crystal panel comprises the steps of forming a gate insulating film, a channel layer and an etching stopper layer on a transparent substrate bearing a gate electrode, exposing the substrate to light from its back surface side by using the gate electrode as a light shielding mask by photolithography, developing the resist, etching the etching stopper layer, forming a source/drain layer, and etching the source/drain layer and a remaining part of the etching stopper by chemical gas phase etching.
    Type: Application
    Filed: September 30, 1999
    Publication date: July 11, 2002
    Inventors: OSAMU TOKUHIRO, HIROYUKI UEDA, MASAHIKO MACHIDA
  • Publication number: 20020016026
    Abstract: A method and an apparatus are provided for manufacturing an active matrix device including a top gate type TFT. A manufacturing process of the top gate type TFT includes the steps of forming an oxide film on the inner wall of a CVD processing chamber and arranging a substrate having source and drain electrodes formed thereon in the processing chamber. Additional steps include doping the source and drain electrodes with P, and forming an a-Si layer and a gate insulating film in the processing chamber. Furthermore, an apparatus is provided for manufacturing an active matrix device including a top gate type TFT having the inner surface of the processing chamber coated with the oxide film.
    Type: Application
    Filed: May 15, 2001
    Publication date: February 7, 2002
    Inventors: Takatoshi Tsujimura, Osamu Tokuhiro, Mitsuo Morooka, Takashi Miyamoto
  • Publication number: 20020003587
    Abstract: An active matrix substrate includes a gate electrode, a gate insulating film, a semiconductor layer, a source electrode and a drain electrode, which are sequentially deposited on an insulating substrate. A transparent conductive layer is deposited on the source and drain electrodes so that the transparent conductive layer includes a portion deposited to be substantially the same pattern as those of the source and drain electrodes. The transparent conductive layer is connected to either the source electrode or the drain electrode to form a pixel electrode. A gate line is further included on which the gate insulating film is deposited. The gate line is to be connected to the gate electrode.
    Type: Application
    Filed: July 6, 2001
    Publication date: January 10, 2002
    Applicant: IBM
    Inventors: Takatoshi Tsujimura, Osamu Tokuhiro, Kohichi Miwa, Mitsuo Morooka
  • Publication number: 20010022361
    Abstract: The present invention relates to minimizing a leakage current in a floating island portion formed in a thin film transistor. More specifically, the present invention is directed to a thin film transistor including: a source electrode 14 and a drain electrode 15 disposed above an insulating substrate 11 at a predetermined interval; an s-Si film 16 disposed in relation to the source electrode 14 and drain electrode 15; a gate insulating film 17 overlapping the a-Si film 16; and a gate electrode 18 overlapping the gate insulating film 17, in which the a-Si film 16 is disposed between the source electrode 14 and the drain electrode 15 and has a floating island portion 20 above which or beneath which the gate electrode 18 is not formed, and boron ions are implanted into this portion to form a boron-ion-implanted region 19.
    Type: Application
    Filed: January 16, 2001
    Publication date: September 20, 2001
    Inventors: Takatoshi Tsujimura, Osamu Tokuhiro, Mitsuo Morooka, Takashi Miyamoto