Abstract: A flow rate of milk during milking is measured to obtain a detection value (a second detection value) D.sub.N having a correlation with respect to the whole amount of milk during a fixed sampling period Ts at any time and a first detection value D.sub.N-1 having a correlation with respect to the whole amount of milk during the fixed sampling period Ts at a time earlier by a fixed time To than the time for the fixed sampling period Ts for the second detection value. A variation ratio C.sub.N of the second detection value D.sub.N to the first detection ratio D.sub.N-1 is calculated by using an equation of (second detection value D.sub.N)/(first detection value D.sub.N-1) and the variation ratios C.sub.N (C.sub.1. . . ) are monitored to detect the variation degree and the variation direction (increasing and decreasing direction) of the flow rate of milk so that the milking condition is monitored when a cow is milked by a milking machine.

Abstract: Disclosed herein is a hybrid circuit element including a redox electrical element formed with redox materials such as biomaterials or pseud-biomaterials and a semiconductor element joined together with the redox electric element. The redox electrical element and the semiconductor element are provided to a common substrate and they are electrically connected to each other with electrical conductors.

Abstract: Disclosed herein is a hybrid circuit element including a redox electrial element formed with redox materials such as biomaterials or pseud-biomaterials and a semiconductor element together with the redox electric element. The redox electrical element and the semiconductor element are provided to a common substrate and they are electrically connected to each other with electrical conductors.

Abstract: A semiconductor device is designed and layed out to have a multiple-layer wiring structure and a logic gate cell structure. The multiple-layer wiring structure is constituted by wiring layers each being a vertical wiring layer for producing vertical wirings or a horizontal wiring layer for producing horizontal wirings, and either of the vertical or horizontal wiring layer is provided in plurality. One of the layers of the plurality of wiring layers is that for producing wirings which constitute input terminals of logic gates, and another layer of the plurality of wiring layers is that for producing wirings which constitute output terminals of logic gates. Wiring is carried out along each wiring grid which is provided for each of the plurality of wiring layers so that lines of different grids are alternately arranged.

Abstract: A logic circuit has the first electron transmission protein film made of the first electron transmission protein, the second electron transmission protein made of the second electron transmission protein having a redox potential different from that of the first electron transmission protein and glued on top of the first electron transmission film, the third electron transmission protein made of the third electron transmission protein having a redox potential different from that of the second electron transmission protein and glued on top of the second electron transmission protein film, an electrode connected to the first electron transmission protein film, an electrode having an electrical influence on the second electron transmission protein film, and an electrode connected to the third electron transmission protein film to form transistors making use of differences in redox potential among the respective electron transmission proteins for performing a logical operation for a plurality of inputs.

Abstract: The present invention relates to a redox electric element circuit formed by using oxidation-reduction substance such as electron-transport protein or the like. Oxidation-reduction substance arranged between redox electric elements and the like is inactivated by energy beam irradiation to form insulating matter, so that wirings and element separation structure are established between redox electric elements and the like.

Abstract: A semiconductor memory device is improved as regards current consumption and access time by dividing the memory cells into a plurality of columner groups and providing group selecting lines. Front-end word lines of low resistance are connected to outputs of row decoders, and AND gates receive selecting signals on the group selecting lines and the outputs of the front-end word lines. Word lines of a comparatively short length are connected to the AND outputs.

Abstract: A differential amplifying circuit includes a pair of main amplifying circuits (5a, 5b) each having at least three input terminals and at least one output terminal, and a pair of auxiliary amplifying circuits (6a, 6b) each having at least one input terminal. Complimentary inputs (D1, D1) are connected to the input terminals of said pair of auxiliary amplifying circuits (6a, 6b), the outputs (D2, D2) of the main amplifying circuits (5a, 5b) are connected as crossing feedback inputs to at least a pair of input terminals of said pair of main amplifying circuits (5a, 5b), the complimentary inputs (D2, D2) are also connected to the other at least one pair of input terminals, and the outputs of said auxiliary amplifying circuits (6a, 6b) are further connected to the further at least pair of input terminals.

Abstract: A semiconductor memory device is improved as regards current consumption and access time by dividing the memory cells into a plurality of columner groups and providing group selecting lines. Front-end word lines flow resistance are connected to outputs of row decoders, and AND gates receive selecting signals on the group selecting lines and the outputs of the front-end word lines. Word lines of a comparatively short length are connected to the AND outputs.