Patents by Inventor Osamu Tonomura
Osamu Tonomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110003482Abstract: Provided is a method of manufacturing a semiconductor device. In the method, an aluminium-containing insulation film is formed on an electrode film of a substrate by alternately repeating a process of supplying an aluminium precursor into a processing chamber in which the substrate is accommodated and exhausting the aluminium precursor from the processing chamber and a process of supplying an oxidizing or nitriding precursor into the processing chamber and exhausting the oxidizing or nitriding precursor from the processing chamber; and a high permittivity insulation film different from the aluminium-containing insulation film is formed on the aluminium-containing insulation film by alternately repeating a process of supplying a precursor into the processing chamber and exhausting the precursor from the processing chamber and a process of supplying an oxidizing precursor into the processing chamber and exhausting the oxidizing precursor from the processing chamber.Type: ApplicationFiled: June 28, 2010Publication date: January 6, 2011Applicant: HITACHI-KOKUSAI ELECTRIC INC.Inventors: Arito Ogawa, Sadayoshi Horii, Taketoshi SATO, Hideharu Itatani, Nobuyuki MISE, Osamu Tonomura
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Patent number: 7796426Abstract: A technique capable of improving speed of a set operation, which controls writing rate in a semiconductor device including a memory cell using a phase-change material. The technique uses means for setting a set-pulse voltage to be applied to the phase-change material to have two steps: the first-step voltage sets a temperature of the phase-change memory to a temperature at which the fastest nucleation is obtained; and the second pulse sets the temperature to a temperature at which the fastest crystal growth is obtained, thereby obtaining solid-phase growth of the phase-change material without melting. Moreover, the technique uses means for controlling the two-step voltage applied to the phase-change memory by a two-step voltage applied to a word line capable of reducing the drain current variation.Type: GrantFiled: October 17, 2005Date of Patent: September 14, 2010Assignee: Renesas Technology Corp.Inventors: Osamu Tonomura, Norikatsu Takaura, Kenzo Kurotsuchi, Nozomu Matsuzaki
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Patent number: 7592272Abstract: An object of the present invention is to provide a method of depositing yttrium-stabilized hafnia use for a DRAM capacitor insulating film while controlling the composition at a high accuracy by an atomic layer deposition method. The atomic deposition method is performed by introducing a hafnium compound precursor, introducing a yttrium compound precursor and introducing an oxidant as one cycle. In the atomic deposition method, the addition amount of yttrium into hafnia is controlled accurately by controlling the time of introducing the hafnium compound precursor and the yttrium compound precursor and controlling the replacement ratio of OH groups on a sample surface by each of the precursors.Type: GrantFiled: March 28, 2007Date of Patent: September 22, 2009Assignee: Hitachi, Ltd.Inventor: Osamu Tonomura
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Publication number: 20090231913Abstract: There is provided a technique capable of improving speed of a set operation, which controls writing rate in a semiconductor device including a memory cell using a phase-change material. The technique uses means for setting a set-pulse voltage to be applied to the phase-change material to have two steps: the first-step voltage sets a temperature of the phase-change memory to a temperature at which the fastest nucleation is obtained; and the second pulse sets the temperature to a temperature at which the fastest crystal growth is obtained, thereby obtaining solid-phase growth of the phase-change material without melting. Moreover, the technique uses means for controlling the two-step voltage applied to the phase-change memory by a two-step voltage applied to a word line capable of reducing the drain current variation.Type: ApplicationFiled: October 17, 2005Publication date: September 17, 2009Applicant: RENESAS TECHNOLOGY CORP.Inventors: Osamu Tonomura, Norikatsu Takaura, Kenzo Kurotsuchi, Nozomu Matsuzaki
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Patent number: 7489552Abstract: In a non-volatile phase change memory, information is recorded by utilizing a change in resistance of a phase change portion. When the phase change portion is allowed to generate Joule's heat and is held at a specific temperature, it goes into a state of a low resistance. When the gate voltage of a memory cell selection transistor QM is controlled to afford a low resistance state, the maximum amount of current applied to the phase change portion is limited by the application of a medium-state voltage to the control gate, thereby avoiding overheating of the phase change portion.Type: GrantFiled: August 9, 2006Date of Patent: February 10, 2009Assignee: Renesas Technology Corp.Inventors: Kenzo Kurotsuchi, Norikatsu Takaura, Osamu Tonomura, Motoyasu Terao, Hideyuki Matsuoka, Riichiro Takemura
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Publication number: 20080157157Abstract: A DRAM capacitor uses ruthenium or ruthenium oxide as an upper electrode and hafnium dioxide or zirconium oxide as an insulation layer. The DRAM capacitor is intended to suppress diffusion of ruthenium, etc. into hafnium dioxide. Tantalum pentoxide or niobium oxide having a higher permittivity than that of the insulation layer is inserted as a cap insulation layer to the boundary between the upper electrode of ruthenium or ruthenium oxide and the insulation layer of hafnium dioxide or zirconium oxide to thereby suppress diffusion of ruthenium, etc. into hafnium dioxide, etc.Type: ApplicationFiled: November 15, 2007Publication date: July 3, 2008Inventors: Osamu TONOMURA, Hiroshi MIKI, Tomoko SEKIGUCHI, Kenichi TAKEDA
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Patent number: 7364965Abstract: A semiconductor device having a DRAM has a capacitor in which a dielectric film and an upper electrode are laminated on a lower electrode comprising a polysilicone, in which a natural oxide film oxidized by oxygen in the atmosphere grows to at least 1.5 nm on the surface of a lower electrode of the capacitor. Further, in forming the dielectric film, the dioxide film further grows in the case of using an oxidative raw material. This brings forth a reduction in capacitance, and an increase of a leakage current is caused. Therefore, after a dielectric film having a reduction property has been formed, the reduction property is promoted by a heat treatment to thereby reduce a dioxide film and realize making the dioxide film on the lower electrode surface thinner.Type: GrantFiled: November 12, 2004Date of Patent: April 29, 2008Assignee: Hitachi, Ltd.Inventors: Osamu Tonomura, Hiroshi Miki, Yuichi Matsui, Tomoko Sekiguchi, Kikuo Watanabe
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Publication number: 20070232501Abstract: An object of the present invention is to provide a method of depositing yttrium-stabilized hafnia use for a DRAM capacitor insulating film while controlling the composition at a high accuracy by an atomic layer deposition method. The atomic deposition method is performed by introducing a hafnium compound precursor, introducing a yttrium compound precursor and introducing an oxidant as one cycle. In the atomic deposition method, the addition amount of yttrium into hafnia is controlled accurately by controlling the time of introducing the hafnium compound precursor and the yttrium compound precursor and controlling the replacement ratio of OH groups on a sample surface by each of the precursors.Type: ApplicationFiled: March 28, 2007Publication date: October 4, 2007Inventor: Osamu TONOMURA
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Publication number: 20060274593Abstract: In a non-volatile phase change memory, information is recorded by utilizing a change in resistance of a phase change portion. When the phase change portion is allowed to generate Joule's heat and is held at a specific temperature, it goes into a state of a low resistance. When the gate voltage of a memory cell selection transistor QM is controlled to afford a low resistance state, the maximum amount of current applied to the phase change portion is limited by the application of a medium-state voltage to the control gate, thereby avoiding overheating of the phase change portion.Type: ApplicationFiled: August 9, 2006Publication date: December 7, 2006Inventors: Kenzo Kurotsuchi, Norikatsu Takaura, Osamu Tonomura, Motoyasu Terao, Hideyuki Matsuoka, Riichiro Takemura
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Patent number: 7123535Abstract: In a non-volatile phase change memory, information is recorded by utilizing a change in resistance of a phase change portion. When the phase change portion is allowed to generate Joule's heat and is held at a specific temperature, it goes into a state of a low resistance. When the gate voltage of a memory cell selection transistor QM is controlled to afford a low resistance state, the maximum amount of current applied to the phase change portion is limited by the application of a medium-state voltage to the control gate, thereby avoiding overheating of the phase change portion.Type: GrantFiled: December 3, 2004Date of Patent: October 17, 2006Assignee: Renesas Technology Corp.Inventors: Kenzo Kurotsuchi, Norikatsu Takaura, Osamu Tonomura, Motoyasu Terao, Hideyuki Matsuoka, Riichiro Takemura
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Publication number: 20050142742Abstract: A semiconductor device having a DRAM has a capacitor in which a dielectric film and an upper electrode are laminated on a lower electrode comprising a polysilicone, in which a natural oxide film oxidized by oxygen in the atmosphere grows to at least 1.5 nm on the surface of a lower electrode of the capacitor. Further, in forming the dielectric film, the dioxide film further grows in the case of using an oxidative raw material. This brings forth a reduction in capacitance, and an increase of a leakage current is caused. Therefore, after a dielectric film having a reduction property has been formed, the reduction property is promoted by a heat treatment to thereby reduce a dioxide film and realize making the dioxide film on the lower electrode surface thinner.Type: ApplicationFiled: November 12, 2004Publication date: June 30, 2005Inventors: Osamu Tonomura, Hiroshi Miki, Yuichi Matsui, Tomoko Sekiguchi, Kikuo Watanabe
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Publication number: 20050128799Abstract: In a non-volatile phase change memory, information is recorded by utilizing a change in resistance of a phase change portion. When the phase change portion is allowed to generate Joule's heat and is held at a specific temperature, it goes into a state of a low resistance. At this time, if a constant voltage source is used, not only the phase change portion assumes a state of a low resistance, but also a large current flows, so that a sample concerned is overheated and goes into a state of a high resistance. Thus, it is difficult to make the phase change portion low in resistance stably. When the gate voltage of a memory cell selection transistor QM is controlled with MISFET to afford a low resistance state, the maximum amount of current applied to the sample is limited by the application of a medium-state voltage.Type: ApplicationFiled: December 3, 2004Publication date: June 16, 2005Inventors: Kenzo Kurotsuchi, Norikatsu Takaura, Osamu Tonomura, Motoyasu Terao, Hideyuki Matsuoka