Abstract: According to one embodiment, a memory controller includes a writing destination management unit which determines a writing destination of user data, an encoding unit which generates a parity of the user data, and an ECC management unit which measures a fatigue degree of each certain memory area of a nonvolatile memory, selects an encoding method to instruct the encoding unit to be performed according to the encoding method, and changes the encoding method to an encoding method having a high error correction capability in a case where the fatigue degree corresponding to the writing destination is equal to or higher than a threshold and a total sum of parities is equal to or less than a predetermined amount.

Abstract: A memory controller includes: an encoder configured to generate a block product code which includes a first code and a second code as component codes, the first code and the second code being linear cyclic codes; a memory interface configured to write the block product code to a nonvolatile memory, and to read a received word from the nonvolatile memory; and a decoder configured to perform a decoding using a code constraint corresponding to a generator polynomial as a common divisor between a generator polynomial of the first code and a generator polynomial of the second code with respect to a symbol of an area which is not subjected to a code constraint of the first code but subjected to a code constraint of the second code.