Patents by Inventor Osamu Ueda
Osamu Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5663841Abstract: A holder is suspended on a carriage, and a magnetic circuit is disposed adjacent to the holder. The magnetic circuit has a first magnetic pole and a second magnetic pole. A focus coil having a magnetic flux receiving portion is provided around a vertical axis of the holder. A tacking coil having a magnetic flux receiving portion is provided around a horizontal axis of the holder. Both the magnetic flux receiving portions are disposed so as not to be overlapped with each other, and disposed in parallel with one of the surface of the first and second magnetic poles. Both of the magnetic flux receiving portions are flush with each other.Type: GrantFiled: July 12, 1995Date of Patent: September 2, 1997Assignee: Pioneer Electronic CorporationInventors: Taichi Akiba, Osamu Ueda, Masayuki Koyama, Shigeyuki Sasanuma
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Patent number: 5629809Abstract: An optical pickup for reproducing information on a disc has a pickup body mounting an optical system and a yoke base mounting an actuator. The pickup body and the yoke base are made of the same magnetic material.Type: GrantFiled: June 12, 1996Date of Patent: May 13, 1997Assignee: Pioneer Electronic CorporationInventors: Toshihiko Kurihara, Taichi Akiba, Osamu Ueda, Shinichi Takahashi
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Patent number: 5621459Abstract: There is provided an image sensing apparatus which comprises a detecting part for detecting an optical characteristic of a photographic optical system, an image sensing part for converting an optical image photographed by the photographic optical system into an electrical signal, a combining part for combining character information with image information outputted from the image sensing part, and a control part for controlling a combining operation of the combining part in accordance with an output of the detecting part.Type: GrantFiled: July 2, 1996Date of Patent: April 15, 1997Assignee: Canon Kabushiki KaishaInventors: Osamu Ueda, Koji Takahashi
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Patent number: 5580809Abstract: Each of the portions corresponding to the crossings of a plurality of first strip conductive layers serving as bit lines and a plurality of second strip conductive layers serving as word lines crossing the conductive layers at right angles is used as one memory cell. An oxide film is provided between the first strip conductive layers and the second strip conductive layers. The thickness of this oxide film is set in each memory cell according to stored data. Also a multi-value memory can be realized, since the amount of stored data in each memory cell is an arbitrary amount of 1 bit or more by making the stored data of a plurality of types of memory cells having different thicknesses in the tunnel oxide film 15 correspond to a plurality of different data. The size of each memory cell can be reduced since the occupying area of each memory cell on the semiconductor substrate is dependent on the width of the first strip conductive layer and the second strip conductive layer.Type: GrantFiled: June 19, 1995Date of Patent: December 3, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Shinichi Mori, Osamu Ueda, Masayuki Yamashita
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Patent number: 5572253Abstract: In order to achieve a digital video camera apparatus which decreases the number of components and facilitates connection with a digital VTR, a luminance signal Y and a color signal C input from external input terminals (110, 118) are converted into digital signals by A/D converters (136, 138) by sampling these signals respectively at the sampling frequency of a digital recording/reproduction device (113) and a frequency four times the subcarrier frequency, the digital signals are selected by selectors (135, 137) together with signals Y and C from a digital signal processing circuit (106), and the selected signals are supplied to the digital signal recording/reproduction device (113). Color-difference signals are supplied after their frequency is converted into the sampling frequency of the digital signal recording/reproduction device (113) by frequency converters (139a, 139b).Type: GrantFiled: June 7, 1995Date of Patent: November 5, 1996Assignee: Canon Kabushiki KaishaInventor: Osamu Ueda
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Patent number: 5557325Abstract: A video camera comprises an image pickup device, an extracting circuit to extract a partial image signal corresponding to a picture plane range of a predetermined portion from a whole image signal which is generated from the image pickup device, and a microcomputer to determine a correction value of the whole image signal on the basis of an output signal of the extracting circuit. The extracting circuit has a function to generate an interruption signal to the microcomputer at a time point when the extracting operation of the partial image signal by the extracting circuit ends. The video camera further has a correcting circuit to correct the whole image signal on the basis of the correction value decided by the microcomputer.Type: GrantFiled: June 14, 1995Date of Patent: September 17, 1996Assignee: Canon Kabushiki KaishaInventors: Osamu Ueda, Hirofumi Suda
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Patent number: 5552826Abstract: In order to achieve a digital video camera apparatus which decreases the number of components and facilitates connection with a digital VTR, a luminance signal Y and a color signal C input from external input terminals (110, 118) are converted into digital signals by A/D converters (136, 138) by sampling these signals respectively at the sampling frequency of a digital recording/reproduction device (113) and a frequency four times the subcarrier frequency, the digital signals are selected by selectors (135, 137) together with signals Y and C from a digital signal processing circuit (106), and the selected signals are supplied to the digital signal recording/reproduction device (113). Color-difference signals are supplied after their frequency is converted into the sampling frequency of the digital signal recording/reproduction device (113) by frequency converters (139a, 139b).Type: GrantFiled: June 7, 1995Date of Patent: September 3, 1996Assignee: Canon Kabushiki KaishaInventors: Teruo Hieda, Osamu Ueda, Norihiro Kawahara
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Patent number: 5510850Abstract: This invention is related to a video signal color correction device. Color information signal inputs are received in rectangular form. A coordinates conversion means converts the inputs into polar coordinates using one of the inputs as a polar axis. The device has a correction data storing means in which are stored luminance signal correction data dependent on a luminance signal and the polar coordinates and color information signal correction data. The correction data storing means outputs the luminance signal correction data and the color information signal correction data in accordance with the luminance signal and the polar coordinates. A correction means corrects the luminance signal and the polar coordinates on the basis of the luminance signal correction data and the color information signal correction data output from the correction data storing means.Type: GrantFiled: November 18, 1994Date of Patent: April 23, 1996Assignee: Canon Kabushiki KaishaInventors: Osamu Ueda, Teruo Hieda, Hideo Kawahara
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Patent number: 5502486Abstract: There is provided an image sensing apparatus which comprises a detecting part for detecting an optical characteristic of a photographic optical system, an image sensing part for converting an optical image photographed by the photographic optical system into an electrical signal, a combining part for combining character information with image information outputted from the image sensing part, and a control part for controlling a combining operation of the combining part in accordance with an output of the detecting part.Type: GrantFiled: February 28, 1994Date of Patent: March 26, 1996Assignee: Canon Kabushiki KaishaInventors: Osamu Ueda, Koji Takahashi
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Patent number: 5485202Abstract: In a white balance adjusting apparatus, information about picture portions whose color components cannot be detected under normal conditions, e.g., picture portions whose brightness level is excessively high, or excessively low, are suppressed from white balance controlling data, so that data required for the white balance control can be correctly obtained without using small windows which a frame of picture is subdivided into. For this purpose, signals of predetermined window portions within one frame of picture are integrated by integration circuits, while weighting the signals by multiplication factor generating means based on brightness level, and then a white balance control is carried out by using an integrated value.Type: GrantFiled: March 1, 1994Date of Patent: January 16, 1996Assignee: Canon Kabushiki KaishaInventor: Osamu Ueda
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Patent number: 5464989Abstract: Each of the portions corresponding to the crossings of a plurality of first strip conductive layers serving as bit lines and a plurality of second strip conductive layers serving as word lines crossing the conductive layers at right angles is used as one memory cell. An oxide film is provided between the first strip conductive layers and the second strip conductive layers. The thickness of this oxide film is set in each memory cell according to stored data. Also a multi-value memory can be realized, since the amount of stored data in each memory cell is an arbitrary amount of 1 bit or more by making the stored data of a plurality of types of memory cells having different thicknesses in the tunnel oxide film 15 correspond to a plurality of different data. The size of each memory cell can be reduced since the occupying area of each memory cell on the semiconductor substrate is dependent on the width of the first strip conductive layer and the second strip conductive layer.Type: GrantFiled: May 17, 1994Date of Patent: November 7, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Shinichi Mori, Osamu Ueda, Masayuki Yamashita
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Patent number: 5436468Abstract: On a substrate having a surface slightly tilted by an angle .alpha. within the range of from 0.5 to 10 degrees from the (110) plane in the <00-1> direction, a superlattice structure having a periodicity in both <110> and <001> directions is formed. Various band structures are possible by selecting an appropriate constituent material and periodicity for the superlattice structure. When current flows in a direction without periodicity, a very high mobility is obtained as a result of suppressed alloy scattering. If current is caused to flow in a direction with periodicity, and the periodicity is properly selected, optical phonon scattering can also be suppressed.Type: GrantFiled: September 19, 1994Date of Patent: July 25, 1995Assignee: Fujitsu LimitedInventors: Yoshiaki Nakata, Osamu Ueda, Satoshi Nakamura
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Patent number: 5394014Abstract: In accordance with one aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip which is directly covered with a resin material having a light shielding property as well as a film which is provided on the resin material for shielding the semiconductor device against light. The film may be formed by a seal having a surface which is covered with a metal and a rear surface which is colored black, a layer of a metal or ceramics which is deposited in a vapor phase, or a coating of an insulating material whose refractive index is different from that of the resin material. In another aspect of the present invention, provided is a semiconductor device which is directly covered with a resin material mixed with a light absorbing material.Type: GrantFiled: November 10, 1993Date of Patent: February 28, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Masahiko Ishikawa, Kohji Hayano, Shinichi Mori, Masayuki Yamashita, Osamu Ueda, Namiki Moriga
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Patent number: 5317195Abstract: Provided is a semiconductor device comprising a semiconductor chip which is directly covered with a resin material having a light shielding property as well as a film which is provided on the resin material for shielding the semiconductor device against light. The film may be formed by a seal having a surface which is covered with a metal and a rear surface which is colored black, a layer of a metal or ceramics which is deposited in a vapor phase, or a coating of an insulating material whose refractive index is different from that of the resin material. In another aspect of the present invention, provided is a semiconductor device which is directly covered with a resin material mixed with a light absorbing material. In still another aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip, having a surface covered with black polyimide, which is further covered with a resin material having a light shielding property.Type: GrantFiled: November 19, 1991Date of Patent: May 31, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Masahiko Ishikawa, Kohji Hayano, Shinichi Mori, Masayuki Yamashita, Osamu Ueda, Namiki Moriga
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Patent number: 5243701Abstract: Data processing system including memory device having even-numbered addresses and odd-numbered addresses in which both an even-numbered address and an odd-numbered address are accessed in the long data bit length mode and either an even-numbered address or an odd-numbered address is accessed in the short data bit length mode, comprising a switching circuit 200 for carrying out the data communication with an odd-numbered address through a high-order data bus 6 or a low-order data bus 5 in the short data bit length mode, and a switching circuit 150 for carrying out the data communication with an odd-numbered address through the low-order data bus 5 in both the long and short data bit length modes. By virtue of this structure, the data communication through the low-order data bus only is made possible for both an even-numbered address and an odd-numbered address in the short data bit length mode.Type: GrantFiled: September 6, 1990Date of Patent: September 7, 1993Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kikuo Muramatsu, Osamu Ueda
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Patent number: 5233561Abstract: A semiconductor storage device formed on a single chip includes a ROM, a RAM and an input/output port. When a mode setting signal designates a normal mode, access is made to one of the ROM, RAM and input/output port in response to an address signal. The ROM is accessed when the mode setting signal designates a ROM write mode and the address signal designates an address assigned to the ROM. A dummy data is output from a data input/output terminal when the mode setting signal designates the ROM write mode, the address signal designates an address outside an address region assigned to the ROM, and a read signal is applied to the device.Type: GrantFiled: September 25, 1991Date of Patent: August 3, 1993Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Shinichi Mori, Osamu Ueda
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Patent number: 5196923Abstract: A video signal correction device is arranged to form a correction signal corresponding to an input video signal, to add the correction signal to the input video signal for correcting the video signal, and, in adding the correction signal to the video signal, to vary the level of the correction signal according to the level of the input video signal. This arrangement enables the device to correct the video signal always in an optimum manner for improved reproducibility of the video signal.Type: GrantFiled: June 17, 1992Date of Patent: March 23, 1993Assignee: Canon Kabushiki KaishaInventors: Osamu Ueda, Teruo Hieda, Hideo Kawahara
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Patent number: 5195099Abstract: A semiconductor memory device having an error correcting circuit includes a circuit for generating a desired test signal with which memory cells used for error correction are to be tested, and another circuit for judging on an chip-basis whether memory cells of the semiconductor memory device are normal or not. The memory cells for error correction can be tested accurately by application of desired test signal. In addition, since there is no necessity of provision of a circuit for comparing externally applied data and data delivered from the semiconductor memory device, a test can be preformed readily.Type: GrantFiled: July 7, 1992Date of Patent: March 16, 1993Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Osamu Ueda, Tsuyoshi Toyama
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Patent number: 5111257Abstract: A non-volatile semiconductor memory device includes a substrate (1) having a plurality of element-forming regions (3), a plurality of recesses (32) located between the element-forming regions (3), and a plurality of element-isolating regions (31); word lines (8a to 8d); bit lines (10) orthogonal to this word lines; and memory cells (511) each formed at the point of intersection of these word and bit lines at each element-forming region (3). Each memory cell (511) includes an electrically floating electrode (5) in the form of a flat plate, a control gate electrode (7) in the form of a substantially flat plate formed on the floating gate electrode (5) and connected to the word lines (8a to 8d), and a pair of impurity regions (21, 23) formed respectively at opposite sides of the floating gate electrode (5) on the surface of a semiconductor substrate (1).Type: GrantFiled: December 14, 1989Date of Patent: May 5, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Nobuaki Andoh, Osamu Ueda
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Patent number: 5046180Abstract: A multifunctional memory comprises a mask ROM (2). When an "L" level signal is applied to a control pin (EXT), data is read out from the ROM (2) in response to an address signal inputted from a multiplex pin (AD/DA). Thereafter, the data read out from the ROM (2) is outputted from the multiplex pin (AD/DA). In this case, an "H" level signal is outputted from a chip select pin (CS). When an "H" level signal is applied to the control pin (EXT), an "L" level signal is outputted from the chip select pin (CE). Consequently, the EPROM (30) is rendered active. In addition, the address signal inputted from the multiplex pin (AD/DA) is outputted from a port/address pin (PORT/AD). Data is read out from the EPROM (30) in response to the address signal.Type: GrantFiled: May 15, 1989Date of Patent: September 3, 1991Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Osamu Ueda, Kikuo Muramatsu