Patents by Inventor Osamu Yairo

Osamu Yairo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070012555
    Abstract: A membrane switch is formed by laminating a pair of flexible printed circuit (FPC) boards with two types of resist between them. An oil-resistant thermally adhesive resist is used in the peripheral area between the laminated FPC boards, and a resist that is not thermally adhesive is used in the central area.
    Type: Application
    Filed: June 5, 2006
    Publication date: January 18, 2007
    Applicant: FANUC LTD
    Inventors: Hiroshi Fuchigami, Osamu Yairo
  • Patent number: 4967101
    Abstract: A pre-drive circuit for controlling turn-on/turn-off of a MOS-type field-effect transistor via a pulse transformer has an element provided between the secondary side of the pulse transformer and the MOS-type field-effect transistor for electrically isolating the pulse transfomer from the MOS-type field-effect transistor when the gate-drain voltage of the MOS-type field-effect transistor becomes negative to a certain degree. Thus, the arrangement is such that the gate-drain voltage of the MOS-type field-effect transistor will not become excessively negative.
    Type: Grant
    Filed: July 11, 1988
    Date of Patent: October 30, 1990
    Assignee: Fanuc Ltd.
    Inventors: Shigeo Nakamura, Osamu Yairo
  • Patent number: 4562361
    Abstract: A power switching transistor drive circuit including a preamplifier (PAP), a base circuit (BSC) for driving a power switching transistor (QL), and a pulse transformer (PT) for electromagnetically coupling the preamplifier (PAP) and the base circuit (BSC). The power switching transistor (QL), which is connected to the output of the vbase circuit (BSC), being on/off controlled based on an input signal applied to the preamplifier (PAP). The preamplifier (PAP) is provided with a low impedance circuit connected in series with the primary coil of the pulse transformer (PT) and forming a closed circuit with the primary coil in response to a flyback voltage generated in the secondary coil of the pulse transformer (PT).
    Type: Grant
    Filed: March 30, 1983
    Date of Patent: December 31, 1985
    Assignee: Fanuc Ltd
    Inventors: Masayuki Hattori, Shigeo Nakamura, Osamu Yairo