Abstract: A semiconductor package includes a die that is interposed, flip-chip style, between an upper lead frame and a lower lead frame. The lower lead frame has contacts that are aligned with terminals on the bottom surface of the die. The upper lead frame contacts a terminal on the top side of the die, and the edges of the upper lead frame are bent downward around the edges of the die, giving the upper lead frame a cup shape. The edge of the upper lead frame contact another portion of the lower lead frame, so that all of the contacts of the package are coplanar and can be surface-mounted on a printed circuit board. The terminals of the die are electrically connected to the lead frames by means of solder layers. The thicknesses of the respective solder layers that connect the die to the lead frames are predetermined to optimize the performance of the package through numerous thermal cycles. This is done by fabricating the lower lead frame with a plurality of mesas and using a double solder reflow process.

Abstract: A semiconductor package includes a die that is interposed, flip-chip style, between an upper lead frame and a lower lead frame. The lower lead frame has contacts that are aligned with terminals on the bottom surface of the die. The upper lead frame contacts a terminal on the top side of the die, and the edges of the upper lead frame are bent downward around the edges of the die, giving the upper lead frame a cup shape. The edge of the upper lead frame contact another portion of the lower lead frame, so that all of the contacts of the package are coplanar and can be surface-mounted on a printed circuit board. The terminals of the die are electrically connected to the lead frames by means of solder layers. The thicknesses of the respective solder layers that connect the die to the lead frames are predetermined to optimize the performance of the package through numerous thermal cycles. This is done by fabricating the lower lead frame with a plurality of mesas and using a double solder reflow process.

Abstract: A semiconductor package includes a die that is interposed, flip-chip style, between an upper lead frame and a lower lead frame. The lower lead frame has contacts that are aligned with terminals on the bottom surface of the die. The upper lead frame contacts a terminal on the top side of the die, and the edges of the upper lead frame are bent downward around the edges of the die, giving the upper lead frame a cup shape. The edge of the upper lead frame contact another portion of the lower lead frame, so that all of the contacts of the package are coplanar and can be surface-mounted on a printed circuit board. The terminals of the die are electrically connected to the lead frames by means of solder layers. The thicknesses of the respective solder layers that connect the die to the lead frames are predetermined to optimize the performance of the package through numerous thermal cycles. This is done by fabricating the lower lead frame with a plurality of mesas and using a double solder reflow process.

Abstract: A semiconductor package includes a die that is interposed, flip-chip style, between an upper lead frame and a lower lead frame. The lower lead frame has contacts that are aligned with terminals on the bottom surface of the die. The upper lead frame contacts a terminal on the top side of the die, and the edges of the upper lead frame are bent downward around the edges of the die, giving the upper lead frame a cup shape. The edge of the upper lead frame contact another portion of the lower lead frame, so that all of the contacts of the package are coplanar and can be surface-mounted on a printed circuit board. The terminals of the die are electrically connected to the lead frames by means of solder layers. The thicknesses of the respective solder layers that connect the die to the lead frames are predetermined to optimize the performance of the package through numerous thermal cycles. This is done by fabricating the lower lead frame with a plurality of mesas and using a double solder reflow process.

Abstract: A die pad (81) of a leadframe (8) has a plurality of slots (811-814) that extend through the die pad to define a restrictive region (815). One of the slots extends around a comer of the restrictive region outside where a die (7) is connected to the die pad by solder paste (6). Because of the cohesion of the solder paste, the solder paste does not flow into the slots. The solder paste is thereby restricted to the restrictive region. This prevents the die from drifting or rotating so as to increase the packaging quality.

Abstract: A power semiconductor device includes a die having a drain contact, a source contact, a primary gate contact, a partitioning region that partitions the source contact, and a secondary gate contact disposed in the partitioning region. A conductive strip is connected to the primary and secondary gate contacts. An insulation layer encloses a segment of the conductive strip. A conductive connecting member includes a metal sheet and a conductive paste. The metal sheet is attached to the source contact via the conductive paste and is formed with a groove to expose the insulation layer from the metal sheet.

Abstract: The present invention relates to a die pad of a leadframe. The die pad is used for receiving a die. The die and the die pad are connected by a solder paste. The die pad comprises a plurality of slots. The slots extend through the die pad. A restrictive region is defined by the slots such that the solder paste is restricted within the restrictive region. The die is positioned on the restrictive region. Because of the cohesion of the solder paste, the solder paste does not flow into the slots. Therefore, the solder paste does not flow and expand everywhere during the heating process. The solder paste is restricted within the restrictive region so that the die on the solder paste does not drift so as to increase the packaging quality.

Abstract: A power semiconductor device includes upper and lower dice that have source, drain and gate contacts, a first metal sheet sandwiched by the upper and lower dice and having source and gate terminals connected to the source and gate contacts of the upper and lower dice, and upper and lower second metal sheets sandwiching assembly of the upper and lower dice and the first metal sheet and respectively having drain terminals that are connected to the drain contacts of the upper and lower dice and that are coupled to each other.