Patents by Inventor Oscar U. Ojeda

Oscar U. Ojeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10438812
    Abstract: The systems and methods described herein use at least one etchant and at least one photochemically active material in conjunction with electromagnetic energy applied simultaneous with the etchant and photochemically active material during the etching process. The interaction between the electromagnetic energy and the photochemically active material preferentially increases the etch rate in a direction along the axis of incidence of the electromagnetic energy, thereby permitting the anisotropic formation of voids within the semiconductor substrate. These anisotropic voids may be more closely spaced (i.e., arranged on a tighter pitch) than the isotropic voids produced using conventional etching technologies. By placing the voids in the semiconductor substrate on a tighter pitch, greater component density may be achieved.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: October 8, 2019
    Assignee: Intel Corporation
    Inventors: Jeremy D. Ecton, Changhua Liu, Arnab Roy, Oscar U. Ojeda, Timothy A. White, Nicholas S. Haehn
  • Publication number: 20180286700
    Abstract: The systems and methods described herein use at least one etchant and at least one photochemically active material in conjunction with electromagnetic energy applied simultaneous with the etchant and photochemically active material during the etching process. The interaction between the electromagnetic energy and the photochemically active material preferentially increases the etch rate in a direction along the axis of incidence of the electromagnetic energy, thereby permitting the anisotropic formation of voids within the semiconductor substrate. These anisotropic voids may be more closely spaced (i.e., arranged on a tighter pitch) than the isotropic voids produced using conventional etching technologies. By placing the voids in the semiconductor substrate on a tighter pitch, greater component density may be achieved.
    Type: Application
    Filed: March 30, 2017
    Publication date: October 4, 2018
    Applicant: INTEL CORPORATION
    Inventors: Jeremy D. Ecton, Changhua Liu, Arnab Roy, Oscar U. Ojeda, Timothy A. White, Nicholas S. Haehn