Patents by Inventor Osman Ersed Akcasu
Osman Ersed Akcasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12172774Abstract: A method is provided for efficient orbital launch trajectories. A payload (e.g., satellite) is launched as high as a first radius with respect to the center of the Earth. The method decreases the payload altitude in response to a gravitational pull of the Earth, and ultimately the payload attains a stable orbit around the Earth at a second radius with respect to the center of the Earth. If the first radius is twice the second radius, the payload acquires a gravitational first potential energy at the first radius, and in the stable orbit the payload has a second (potential and kinetic) energy equal to the gravitational first potential energy, with the second kinetic energy being equal to the energy required to maintain a stable orbital velocity. Advantageously, the stable orbit can potentially be at any orbital inclination angle in the range between 0 and 360 degrees.Type: GrantFiled: February 16, 2024Date of Patent: December 24, 2024Assignee: Akcasa hypersonics, LLCInventor: Osman Ersed Akcasu
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Publication number: 20240242874Abstract: New types of circuit elements for integrated circuits include structures wherein a thickness dimension is much greater than a width dimension and is more closely spaced than the width dimension in order to attain a tight coupling condition. The structure is suitable to form inductors, capacitors, transmission lines and low impedance power distribution networks in integrated circuits. The width dimension is on the same order of magnitude as skin depth. Embodiments include a spiral winding disposed in a silicon substrate formed of a deep, narrow, conductor-covered spiral ridge separated by a narrow spiral trench. Other embodiments include a wide, thin conductor formed in or on a flexible insulative ribbon and wound with turns adjacent one another, or a conductor in or on a flexible insulative sheet folded into layers with windings adjacent one another Further, a method of manufacture includes directional etching of the deep, narrow spiral trench to form a winding in silicon.Type: ApplicationFiled: December 15, 2023Publication date: July 18, 2024Inventor: Osman Ersed Akcasu
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Patent number: 11990266Abstract: New types of circuit elements for integrated circuits include structures wherein a thickness dimension is much greater than a width dimension and is more closely spaced than the width dimension in order to attain a tight coupling condition. The structure is suitable to form inductors, capacitors, transmission lines and low impedance power distribution networks in integrated circuits. The width dimension is on the same order of magnitude as skin depth. Embodiments include a spiral winding disposed in a silicon substrate formed of a deep, narrow, conductor-covered spiral ridge separated by a narrow spiral trench. Other embodiments include a wide, thin conductor formed in or on a flexible insulative ribbon and wound with turns adjacent one another, or a conductor in or on a flexible insulative sheet folded into layers with windings adjacent one another Further, a method of manufacture includes directional etching of the deep, narrow spiral trench to form a winding in silicon.Type: GrantFiled: November 1, 2022Date of Patent: May 21, 2024Assignee: nanoHenry, Inc.Inventor: Osman Ersed Akcasu
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Publication number: 20230274879Abstract: The present invention comprises a specially designed means of air gap optimization for magnetically permeable material used in electrical components, for example, inductors and transformers. First, an ideal inductance over current curve is selected, and a core start point, endpoint, start angle, and end angle are selected within the core or along the core edges. Given the ideal curve and the starting conditions, an air gap is designed which meets or comes as close as possible to the ideal curve selected. Multiple air gaps can be designed in a single core. The inclusion of novel partial air gaps enables curves to be reached that optimize the core for high and low currents.Type: ApplicationFiled: November 4, 2022Publication date: August 31, 2023Applicant: Atlas MagneticsInventors: John Othniel McDonald, Osman Ersed Akcasu
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Publication number: 20230069135Abstract: New types of circuit elements for integrated circuits include structures wherein a thickness dimension is much greater than a width dimension and is more closely spaced than the width dimension in order to attain a tight coupling condition. The structure is suitable to form inductors, capacitors, transmission lines and low impedance power distribution networks in integrated circuits. The width dimension is on the same order of magnitude as skin depth. Embodiments include a spiral winding disposed in a silicon substrate formed of a deep, narrow, conductor-covered spiral ridge separated by a narrow spiral trench. Other embodiments include a wide, thin conductor formed in or on a flexible insulative ribbon and wound with turns adjacent one another, or a conductor in or on a flexible insulative sheet folded into layers with windings adjacent one another Further, a method of manufacture includes directional etching of the deep, narrow spiral trench to form a winding in silicon.Type: ApplicationFiled: November 1, 2022Publication date: March 2, 2023Inventor: Osman Ersed Akcasu
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Publication number: 20230057305Abstract: A complex-shaped air gap for electrical components utilizing magnetically permeable material. The air is enabled to thermally distribute heat through a magnetic core and thus reduce issues relating to heat localization. The air gap shape is maximized for length, and in the preferred embodiment is a spiral shape. The preferred embodiment is built by a lithography process, without cutting, to enable the thin spiraling shape.Type: ApplicationFiled: August 22, 2022Publication date: February 23, 2023Inventors: John Othniel McDonald, Osman Ersed Akcasu
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Patent number: 11501908Abstract: New types of circuit elements for integrated circuits include structures wherein a thickness dimension is much greater than a width dimension and is more closely spaced than the width dimension in order to attain a tight coupling condition. The structure is suitable to form inductors, capacitors, transmission lines and low impedance power distribution networks in integrated circuits. The width dimension is on the same order of magnitude as skin depth. Embodiments include a spiral winding disposed in a silicon substrate formed of a deep, narrow, conductor-covered spiral ridge separated by a narrow spiral trench. Other embodiments include a wide, thin conductor formed in or on a flexible insulative ribbon and wound with turns adjacent one another, or a conductor in or on a flexible insulative sheet folded into layers with windings adjacent one another Further, a method of manufacture includes directional etching of the deep, narrow spiral trench to form a winding in silicon.Type: GrantFiled: October 4, 2016Date of Patent: November 15, 2022Assignee: nanoHenry, Inc.Inventor: Osman Ersed Akcasu
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Patent number: 11224675Abstract: Disclosed herein is a forced irradiated air shielding mechanism that is an effective protective measure against Covid-19. The UV-C irradiated forced air flow face shield described herein is compact enough to be camouflaged under a cap. In this work it is mathematically proven that the described UV-C irradiated forced air flow face shield by itself provides more effective protection against the Covid-19 or similar airborne pathogens. The shield can be enabled using a mercury discharge tube or light emitting diode (LED) irradiator. Computational fluid dynamics is presented to show that positive irradiated air pressure ensures that the only air breathed by the wearer is irradiated. Also presented is a face shield testing apparatus.Type: GrantFiled: June 21, 2021Date of Patent: January 18, 2022Assignee: Akcasu Airborne Virus Protection Systems, Inc.Inventor: Osman Ersed Akcasu
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Patent number: 11213603Abstract: Disclosed herein is a forced irradiated air shielding mechanism that is an effective protective measure against Covid-19. The UV-C irradiated forced air flow face shield described herein is compact enough to be camouflaged under a cap. In this work it is mathematically proven that the described UV-C irradiated forced air flow face shield by itself provides more effective protection against the Covid-19 or similar airborne pathogens. The shield can be enabled using a mercury discharge tube or light emitting diode (LED) irradiator. Computational fluid dynamics is presented to show that positive irradiated air pressure ensures that the only air breathed by the wearer is irradiated. Also presented is a face shield testing apparatus.Type: GrantFiled: June 21, 2021Date of Patent: January 4, 2022Assignee: Akcasu Airborne Virus Protection Systems, Inc.Inventor: Osman Ersed Akcasu
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Patent number: 11054680Abstract: Provided are devices and methods capable of electronically controlling and varying aperture diameters or diffracting light. The method provides a solid-state device made up of a transparent bottom electrode (TBE), a layer of liquid crystal (LC) material overlying the TBE, and a field of selectively engageable transparent top electrodes (TTEs). Light incident to the TTEs is accepted and a voltage differential between one or more selected TTEs and the TBE. As a result, an optically transparent region is created in the LC material interposed between the selected TTEs and the TBE. Depending on the arrangement of the TTEs and their size respective to the wavelength of the incident light, the light is either transmitted through an aperture or diffracted.Type: GrantFiled: February 9, 2019Date of Patent: July 6, 2021Assignee: UltResFP, LLCInventor: Osman Ersed Akcasu
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Patent number: 10872950Abstract: A method is provided for fabricating thick silicon oxide structures, such as an embedded inductor. A Deep Reactive Ion Etch (DREI) etches the top silicon layer of a substrate to form high aspect ratio Si features, called trench texturing. The Si features are oxidized to form silicon oxide features. Adjacent Si features are separated by a trench width (S(0)), so that after oxidation, adjacent Si oxide features are formed separated by trench width (S(t)), where S(t)?S(0) (e.g., S(t)=0). If the Si features have a width WSi(0)>1.2728 S(0), then the adjacent silicon oxide features form an amorphously merged silicon oxide feature with a planar top surface. The silicon oxide features have a height (HOX(t)) responsive to the trench width (S(0)), the Si feature width (WSi(t)), and the Si feature aspect ratio. After oxidation, inductor metal is deposited in trenches where WSi(0)<1.2728 S(0).Type: GrantFiled: November 15, 2019Date of Patent: December 22, 2020Assignee: NanoHenry Inc.Inventor: Osman Ersed Akcasu
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Patent number: 10739626Abstract: Provided are devices and methods capable of electronically controlling and varying aperture diameters or diffracting light. The method provides a solid-state device made up of a transparent bottom electrode (TBE), a layer of liquid crystal (LC) material overlying the TBE, and a field of selectively engageable transparent top electrodes (TTEs). Light incident to the TTEs is accepted and a voltage differential between one or more selected TTEs and the TBE. As a result, an optically transparent region is created in the LC material interposed between the selected TTEs and the TBE. Depending on the arrangement of the TTEs and their size respective to the wavelength of the incident light, the light is either transmitted through an aperture or diffracted.Type: GrantFiled: February 13, 2020Date of Patent: August 11, 2020Assignee: UltRes FP, LLCInventor: Osman Ersed Akcasu
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Publication number: 20200209666Abstract: Provided are devices and methods capable of electronically controlling and varying aperture diameters or diffracting light. The method provides a solid-state device made up of a transparent bottom electrode (TBE), a layer of liquid crystal (LC) material overlying the TBE, and a field of selectively engageable transparent top electrodes (TTEs). Light incident to the TTEs is accepted and a voltage differential between one or more selected TTEs and the TBE. As a result, an optically transparent region is created in the LC material interposed between the selected TTEs and the TBE. Depending on the arrangement of the TTEs and their size respective to the wavelength of the incident light, the light is either transmitted through an aperture or diffracted.Type: ApplicationFiled: February 13, 2020Publication date: July 2, 2020Inventor: Osman Ersed Akcasu
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Publication number: 20200105860Abstract: A method is provided for fabricating thick silicon oxide structures, such as an embedded inductor. A Deep Reactive Ion Etch (DREI) etches the top silicon layer of a substrate to form high aspect ratio Si features, called trench texturing. The Si features are oxidized to form silicon oxide features. Adjacent Si features are separated by a trench width (S(0)), so that after oxidation, adjacent Si oxide features are formed separated by trench width (S(t)), where S(t)?S(0) (e.g., S(t)=0). If the Si features have a width WSi(0)>1.2728 S(0), then the adjacent silicon oxide features form an amorphously merged silicon oxide feature with a planar top surface. The silicon oxide features have a height (HOX(t)) responsive to the trench width (S(0)), the Si feature width (WSi(t)), and the Si feature aspect ratio. After oxidation, inductor metal is deposited in trenches where WSi(0)<1.2728 S(0).Type: ApplicationFiled: November 15, 2019Publication date: April 2, 2020Inventor: Osman Ersed Akcasu
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Patent number: 10599909Abstract: An electronic device and method are provided having an optical image sensor and a capacitive proximity sensor. A pin hole opening within a ring electrode of the capacitive proximity sensor is integrated into and used by the optical sensor. Inner and outer electrodes of the ring electrode can be centered about the pin hole opening and spaced apart to perform capacitive proximity detection of a live finger. When brought in proximity to the ring electrode, the finger can be imaged using the present integrated capacitive proximity sensor with an optical sensing mechanism that utilizes the pin hole to not only allow for micro-imaging of an object, such as a finger, but also to provide high resolution fingerprint comparison and blood oxyhemoglobin saturation comparison for biometric control and access to an electronic device, such as a mobile phone.Type: GrantFiled: August 7, 2018Date of Patent: March 24, 2020Assignee: UITResFP, LLCInventor: Osman Ersed Akcasu
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Publication number: 20200050829Abstract: An electronic device and method are provided having an optical image sensor and a capacitive proximity sensor. A pin hole opening within a ring electrode of the capacitive proximity sensor is integrated into and used by the optical sensor. Inner and outer electrodes of the ring electrode can be centered about the pin hole opening and spaced apart to perform capacitive proximity detection of a live finger. When brought in proximity to the ring electrode, the finger can be imaged using the present integrated capacitive proximity sensor with an optical sensing mechanism that utilizes the pin hole to not only allow for micro-imaging of an object, such as a finger, but also to provide high resolution fingerprint comparison and blood oxyhemoglobin saturation comparison for biometric control and access to an electronic device, such as a mobile phone.Type: ApplicationFiled: August 7, 2018Publication date: February 13, 2020Applicant: UltResFP, LLCInventor: Osman Ersed Akcasu
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Patent number: 10510828Abstract: High aspect ratio passive electrical components are presented formed from a single-piece silicon (Si) substrate having a textured surface with at least one high aspect ratio structure. The high aspect ratio structure includes a Si core having a width (CX), a height (CZ), and a minimum aspect ratio of CZ-to-CX of at least 5:1. An electrical conductor layer overlies the Si core. The electrical component may be a capacitor, inductor, or transmission line. In the case of a capacitor, the substrate textured first surface is made up of a plurality of adjacent high aspect ratio conductor-dielectric-Si (CDS) structures. Each CDS structure includes: a Si core, a dielectric layer overlying the Si core, and an electrical conductor layer overlying the dielectric layer. The Si cores may be formed in the geometry of parallel ridges, columns, or as a honeycomb. Each Si core comprises at least 90% of the CDS structure height.Type: GrantFiled: December 12, 2018Date of Patent: December 17, 2019Assignee: Nano Henry, Inc.Inventor: Osman Ersed Akcasu
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Publication number: 20190115422Abstract: High aspect ratio passive electrical components are presented formed from a single-piece silicon (Si) substrate having a textured surface with at least one high aspect ratio structure. The high aspect ratio structure includes a Si core having a width (CX), a height (CZ), and a minimum aspect ratio of CZ-to-CX of at least 5:1. An electrical conductor layer overlies the Si core. The electrical component may be a capacitor, inductor, or transmission line. In the case of a capacitor, the substrate textured first surface is made up of a plurality of adjacent high aspect ratio conductor-dielectric-Si (CDS) structures. Each CDS structure includes: a Si core, a dielectric layer overlying the Si core, and an electrical conductor layer overlying the dielectric layer. The Si cores may be formed in the geometry of parallel ridges, columns, or as a honeycomb. Each Si core comprises at least 90% of the CDS structure height.Type: ApplicationFiled: December 12, 2018Publication date: April 18, 2019Inventor: Osman Ersed Akcasu
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Patent number: 9949339Abstract: A method and apparatus are provided to control artificial lighting using accurate geographical location, date and time, in order to activate such electrical activity only during needed periods of actual terrestrial darkness related to sun elevation. Accurate, real-time calculation of sun elevation relative to geographical location and date/time allow natural lighting characteristics such as natural light spectrum and intensity to be matched to artificial lighting, in order to provide a smooth transition in ambient lighting and to save energy. An apparatus according to the invention comprises a global positioning system (GPS) element for determining latitude, longitude, altitude, date and time and a calculation element for determining sun elevation angle accurately. A specific embodiment requires only desired sun elevation angle inputs from the user for controlling electrical switches in a control system.Type: GrantFiled: May 23, 2014Date of Patent: April 17, 2018Assignee: Lonestar Inventions, L.P.Inventors: Osman Ersed Akcasu, Ibrahim Akcay, Ibrahim Onur Uslu, Jacqueline Mahan Akcasu
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Publication number: 20180096777Abstract: New types of circuit elements for integrated circuits include structures wherein a thickness dimension is much greater than a width dimension and is more closely spaced than the width dimension in order to attain a tight coupling condition. The structure is suitable to form inductors, capacitors, transmission lines and low impedance power distribution networks in integrated circuits. The width dimension is on the same order of magnitude as skin depth. Embodiments include a spiral winding disposed in a silicon substrate formed of a deep, narrow, conductor-covered spiral ridge separated by a narrow spiral trench. Other embodiments include a wide, thin conductor formed in or on a flexible insulative ribbon and wound with turns adjacent one another, or a conductor in or on a flexible insulative sheet folded into layers with windings adjacent one another Further, a method of manufacture includes directional etching of the deep, narrow spiral trench to form a winding in silicon.Type: ApplicationFiled: October 4, 2016Publication date: April 5, 2018Inventor: Osman Ersed Akcasu